A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries
This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm/sup 2/, it is very suitable as a VLSI library cell. The floating class-AB control is shifted into the summing circuit, which re...
Gespeichert in:
Veröffentlicht in: | IEEE journal of solid-state circuits 1994-12, Vol.29 (12), p.1505-1513 |
---|---|
Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 1513 |
---|---|
container_issue | 12 |
container_start_page | 1505 |
container_title | IEEE journal of solid-state circuits |
container_volume | 29 |
creator | Hogervorst, R. Tero, J.P. Eschauzier, R.G.H. Huijsing, J.H. |
description | This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm/sup 2/, it is very suitable as a VLSI library cell. The floating class-AB control is shifted into the summing circuit, which results in a noise and offset of the amplifier which are comparable to that of a three stage amplifier. A floating current source biases the combined summing circuit and the class-AB control. This current source has the same structure as the class-AB control which provides a power-supply-independent quiescent current. Using the compact architecture, a 2.6 MHz amplifier with Miller compensation and a 6.4 MHz amplifier with cascoded-Miller compensation have been realized. The opamps have, respectively, a bandwidth-to-supply-power ratio of 4 MHz/mW and 11 MHz/mW for a capacitive load of 10 pF.< > |
doi_str_mv | 10.1109/4.340424 |
format | Article |
fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_miscellaneous_28186589</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>340424</ieee_id><sourcerecordid>28186589</sourcerecordid><originalsourceid>FETCH-LOGICAL-c404t-ea3fda86972f6e8a92a1d23bf6cc2abfeac6b91eb552ad735c477a6f49b0d9883</originalsourceid><addsrcrecordid>eNpFkM9LwzAYhoMoOKfg2VMOIl66JU3apscx_DGY7DAd3srX9AtktE1NOsT_3o4OPT18fA8vLy8ht5zNOGf5XM6EZDKWZ2TCk0RFPBOf52TCGFdRHjN2Sa5C2A-nlIpPyH5BtWs60D3t3Df6CI2x2mLbU0F3dPm22VIPto56Fx1Jbdsd-rk79AOo69BDb10LNYWmq62x6Klxnu7W2xXVWNe0tqUHbzFckwsDdcCbE6fk4_npffkarTcvq-ViHemheB8hCFOBSvMsNikqyGPgVSxKk2odQ2kQdFrmHMskiaHKRKJllkFqZF6yKldKTMnDmNt593XA0BeNDccq0KI7hCJWXKWJygfxcRS1dyF4NEXnbQP-p-CsOI5ZyGIcc1DvT5kQNNTGQ6tt-POFSBMuskG7GzWLiP_fMeMXAZd8mA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>28186589</pqid></control><display><type>article</type><title>A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries</title><source>IEEE Electronic Library (IEL)</source><creator>Hogervorst, R. ; Tero, J.P. ; Eschauzier, R.G.H. ; Huijsing, J.H.</creator><creatorcontrib>Hogervorst, R. ; Tero, J.P. ; Eschauzier, R.G.H. ; Huijsing, J.H.</creatorcontrib><description>This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm/sup 2/, it is very suitable as a VLSI library cell. The floating class-AB control is shifted into the summing circuit, which results in a noise and offset of the amplifier which are comparable to that of a three stage amplifier. A floating current source biases the combined summing circuit and the class-AB control. This current source has the same structure as the class-AB control which provides a power-supply-independent quiescent current. Using the compact architecture, a 2.6 MHz amplifier with Miller compensation and a 6.4 MHz amplifier with cascoded-Miller compensation have been realized. The opamps have, respectively, a bandwidth-to-supply-power ratio of 4 MHz/mW and 11 MHz/mW for a capacitive load of 10 pF.< ></description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/4.340424</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Circuit noise ; Circuit properties ; Electric, optical and optoelectronic circuits ; Electronic circuits ; Electronics ; Exact sciences and technology ; Frequency ; Libraries ; Operational amplifiers ; Oscillators, resonators, synthetizers ; Power amplifiers ; Rail to rail amplifiers ; Rail to rail inputs ; Summing circuits ; Very large scale integration ; Voltage</subject><ispartof>IEEE journal of solid-state circuits, 1994-12, Vol.29 (12), p.1505-1513</ispartof><rights>1995 INIST-CNRS</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c404t-ea3fda86972f6e8a92a1d23bf6cc2abfeac6b91eb552ad735c477a6f49b0d9883</citedby><cites>FETCH-LOGICAL-c404t-ea3fda86972f6e8a92a1d23bf6cc2abfeac6b91eb552ad735c477a6f49b0d9883</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/340424$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,776,780,785,786,792,23909,23910,25118,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/340424$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=3365137$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Hogervorst, R.</creatorcontrib><creatorcontrib>Tero, J.P.</creatorcontrib><creatorcontrib>Eschauzier, R.G.H.</creatorcontrib><creatorcontrib>Huijsing, J.H.</creatorcontrib><title>A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm/sup 2/, it is very suitable as a VLSI library cell. The floating class-AB control is shifted into the summing circuit, which results in a noise and offset of the amplifier which are comparable to that of a three stage amplifier. A floating current source biases the combined summing circuit and the class-AB control. This current source has the same structure as the class-AB control which provides a power-supply-independent quiescent current. Using the compact architecture, a 2.6 MHz amplifier with Miller compensation and a 6.4 MHz amplifier with cascoded-Miller compensation have been realized. The opamps have, respectively, a bandwidth-to-supply-power ratio of 4 MHz/mW and 11 MHz/mW for a capacitive load of 10 pF.< ></description><subject>Applied sciences</subject><subject>Circuit noise</subject><subject>Circuit properties</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Frequency</subject><subject>Libraries</subject><subject>Operational amplifiers</subject><subject>Oscillators, resonators, synthetizers</subject><subject>Power amplifiers</subject><subject>Rail to rail amplifiers</subject><subject>Rail to rail inputs</subject><subject>Summing circuits</subject><subject>Very large scale integration</subject><subject>Voltage</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1994</creationdate><recordtype>article</recordtype><recordid>eNpFkM9LwzAYhoMoOKfg2VMOIl66JU3apscx_DGY7DAd3srX9AtktE1NOsT_3o4OPT18fA8vLy8ht5zNOGf5XM6EZDKWZ2TCk0RFPBOf52TCGFdRHjN2Sa5C2A-nlIpPyH5BtWs60D3t3Df6CI2x2mLbU0F3dPm22VIPto56Fx1Jbdsd-rk79AOo69BDb10LNYWmq62x6Klxnu7W2xXVWNe0tqUHbzFckwsDdcCbE6fk4_npffkarTcvq-ViHemheB8hCFOBSvMsNikqyGPgVSxKk2odQ2kQdFrmHMskiaHKRKJllkFqZF6yKldKTMnDmNt593XA0BeNDccq0KI7hCJWXKWJygfxcRS1dyF4NEXnbQP-p-CsOI5ZyGIcc1DvT5kQNNTGQ6tt-POFSBMuskG7GzWLiP_fMeMXAZd8mA</recordid><startdate>19941201</startdate><enddate>19941201</enddate><creator>Hogervorst, R.</creator><creator>Tero, J.P.</creator><creator>Eschauzier, R.G.H.</creator><creator>Huijsing, J.H.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19941201</creationdate><title>A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries</title><author>Hogervorst, R. ; Tero, J.P. ; Eschauzier, R.G.H. ; Huijsing, J.H.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c404t-ea3fda86972f6e8a92a1d23bf6cc2abfeac6b91eb552ad735c477a6f49b0d9883</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1994</creationdate><topic>Applied sciences</topic><topic>Circuit noise</topic><topic>Circuit properties</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Frequency</topic><topic>Libraries</topic><topic>Operational amplifiers</topic><topic>Oscillators, resonators, synthetizers</topic><topic>Power amplifiers</topic><topic>Rail to rail amplifiers</topic><topic>Rail to rail inputs</topic><topic>Summing circuits</topic><topic>Very large scale integration</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Hogervorst, R.</creatorcontrib><creatorcontrib>Tero, J.P.</creatorcontrib><creatorcontrib>Eschauzier, R.G.H.</creatorcontrib><creatorcontrib>Huijsing, J.H.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hogervorst, R.</au><au>Tero, J.P.</au><au>Eschauzier, R.G.H.</au><au>Huijsing, J.H.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1994-12-01</date><risdate>1994</risdate><volume>29</volume><issue>12</issue><spage>1505</spage><epage>1513</epage><pages>1505-1513</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm/sup 2/, it is very suitable as a VLSI library cell. The floating class-AB control is shifted into the summing circuit, which results in a noise and offset of the amplifier which are comparable to that of a three stage amplifier. A floating current source biases the combined summing circuit and the class-AB control. This current source has the same structure as the class-AB control which provides a power-supply-independent quiescent current. Using the compact architecture, a 2.6 MHz amplifier with Miller compensation and a 6.4 MHz amplifier with cascoded-Miller compensation have been realized. The opamps have, respectively, a bandwidth-to-supply-power ratio of 4 MHz/mW and 11 MHz/mW for a capacitive load of 10 pF.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/4.340424</doi><tpages>9</tpages><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0018-9200 |
ispartof | IEEE journal of solid-state circuits, 1994-12, Vol.29 (12), p.1505-1513 |
issn | 0018-9200 1558-173X |
language | eng |
recordid | cdi_proquest_miscellaneous_28186589 |
source | IEEE Electronic Library (IEL) |
subjects | Applied sciences Circuit noise Circuit properties Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Frequency Libraries Operational amplifiers Oscillators, resonators, synthetizers Power amplifiers Rail to rail amplifiers Rail to rail inputs Summing circuits Very large scale integration Voltage |
title | A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-11T05%3A45%3A43IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20compact%20power-efficient%203%20V%20CMOS%20rail-to-rail%20input/output%20operational%20amplifier%20for%20VLSI%20cell%20libraries&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Hogervorst,%20R.&rft.date=1994-12-01&rft.volume=29&rft.issue=12&rft.spage=1505&rft.epage=1513&rft.pages=1505-1513&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/4.340424&rft_dat=%3Cproquest_RIE%3E28186589%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=28186589&rft_id=info:pmid/&rft_ieee_id=340424&rfr_iscdi=true |