Scalable CMOS back-end-of-line-compatible AlScN/two-dimensional channel ferroelectric field-effect transistors

Three-dimensional monolithic integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrent with enhanced energy efficiency in big data applications such as artificial intelligence. Despit...

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Veröffentlicht in:	Nature nanotechnology 2023-09, Vol.18 (9), p.1044-1050
Hauptverfasser:	Kim, Kwan-Ho, Oh, Seyong, Fiagbenu, Merrilyn Mercy Adzo, Zheng, Jeffrey, Musavigharavi, Pariasadat, Kumar, Pawan, Trainor, Nicholas, Aljarb, Areej, Wan, Yi, Kim, Hyong Min, Katti, Keshava, Song, Seunguk, Kim, Gwangwoo, Tang, Zichen, Fu, Jui-Han, Hakami, Mariam, Tung, Vincent, Redwing, Joan M., Stach, Eric A., Olsson, Roy H., Jariwala, Deep
Format:	Artikel
Sprache:	eng
Schlagworte:	639/166/987 639/301/1005/1008 639/301/357/1018 639/925/357/1018 639/925/927/1007 Arrays Artificial intelligence Chemistry and Materials Science CMOS Current density Energy efficiency Ferroelectric materials Ferroelectricity Field effect transistors Low dimensional semiconductors Materials Science Memory devices Molybdenum disulfide Nanotechnology Nanotechnology and Microengineering Semiconductor devices Transistors
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