A 100 MHz 2-D 8x 8 DCT/IDCT processor for HDTV applications
This paper discusses the design of a combined DCT/IDCT CMOS integrated circuit for real time processing of HDTV signals. The processor operates on 8x8 blocks. Inputs include the blocked pixels that are scanned one pixel at a time, and external control signals that control the forward or inverse mode...
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| Veröffentlicht in: | IEEE transactions on circuits and systems for video technology 1995-04, Vol.5 (2), p.158-165 |
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| Hauptverfasser: | , |
| Format: | Artikel |
| Sprache: | eng |
| Online-Zugang: | Volltext |
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