Design and Implementation of Finite Impulse Response (FIR) Filter
In the field of digital design system, field programmable gate array(FPGA) design is one of the most important methods for its feature of reconstruction and ISP. Using very-high-speed-integrated circuit hardware description language(VHDL) implentation for example, the article is mainly about the FPG...
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| Veröffentlicht in: | Shànghăi jiāotōng dàxué xuébào 2004-12, Vol.39 (12), p.2045-2047 |
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| container_end_page | 2047 |
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| container_issue | 12 |
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| container_title | Shànghăi jiāotōng dàxué xuébào |
| container_volume | 39 |
| creator | Ruan, Yi Huang, Pei-Thong Wei, Yang |
| description | In the field of digital design system, field programmable gate array(FPGA) design is one of the most important methods for its feature of reconstruction and ISP. Using very-high-speed-integrated circuit hardware description language(VHDL) implentation for example, the article is mainly about the FPGA design of an eighth order FIR filter, which is verified in the digital signal process circuit of fiber optic gyro. |
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| fulltext | fulltext |
| identifier | ISSN: 1006-2467 |
| ispartof | Shànghăi jiāotōng dàxué xuébào, 2004-12, Vol.39 (12), p.2045-2047 |
| issn | 1006-2467 |
| language | chi |
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| source | Alma/SFX Local Collection |
| title | Design and Implementation of Finite Impulse Response (FIR) Filter |
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