Optimization of embedded compact nonvolatile memories for sub-100-nm CMOS generations

The performance of compact nonvolatile memory cells, meant for embedded applications in advanced CMOS processes, is studied and analyzed in detail by means of technology computer-aided design (TCAD), and new experimental results are presented. Improvement of the memory performance is achieved. The k...

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Veröffentlicht in:	IEEE transactions on electron devices 2005-04, Vol.52 (4), p.492-499
Hauptverfasser:	Akil, N., van Duuren, M., Slotboom, M., Baks, W., Goarin, P., van Schaijk, R., Tello, P.G., Cuppens, R.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Circuit optimization CMOS CMOS integrated circuits Design. Technologies. Operation analysis. Testing Devices EEPROM Electric potential Electronics EPROM Exact sciences and technology Gates halo Integrated circuits Integrated circuits by function (including memories and processors) Leakage currents Magnetic and optical mass memories Optimization Oxides Semiconductor devices Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices source-side injection Storage and reproduction of information technology computer-aided design (TCAD) Transistors Voltage
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