CDF level 2 trigger upgrade

We describe the new CDF Level 2 Trigger, which was commissioned during Spring 2005. The upgrade was necessitated by several factors that included increased bandwidth requirements, in view of the growing instantaneous luminosity of the Tevatron, and the need for a more robust system, since the older...

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Veröffentlicht in:IEEE transactions on nuclear science 2006-04, Vol.53 (2), p.653-658
Hauptverfasser: Anikeev, K., Bogdan, M., Demaat, R., Fedorko, W., Frisch, H., Hahn, K., Hakala, M., Keener, P., Kim, Y., Kroll, J., Kwang, S., Lewis, J., Lin, C., Liu, T., Marjamaa, F., Mansikkala, T., Neu, C., Pitkanen, S., Reisert, B., Rusu, V., Sanders, H., Shochet, M., Stabenau, H., Van Berg, R., Wilson, P., Whiteson, D., Wittich, P.
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container_issue 2
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container_title IEEE transactions on nuclear science
container_volume 53
creator Anikeev, K.
Bogdan, M.
Demaat, R.
Fedorko, W.
Frisch, H.
Hahn, K.
Hakala, M.
Keener, P.
Kim, Y.
Kroll, J.
Kwang, S.
Lewis, J.
Lin, C.
Liu, T.
Marjamaa, F.
Mansikkala, T.
Neu, C.
Pitkanen, S.
Reisert, B.
Rusu, V.
Sanders, H.
Shochet, M.
Stabenau, H.
Van Berg, R.
Wilson, P.
Whiteson, D.
Wittich, P.
description We describe the new CDF Level 2 Trigger, which was commissioned during Spring 2005. The upgrade was necessitated by several factors that included increased bandwidth requirements, in view of the growing instantaneous luminosity of the Tevatron, and the need for a more robust system, since the older system was reaching the limits of maintainability. The challenges in designing the new system were interfacing with many different upstream detector subsystems, processing larger volumes of data at higher speed, and minimizing the impact on running the CDF experiment during the system commissioning phase. To meet these challenges, the new system was designed around a general purpose motherboard, the PULSAR, which is instrumented with powerful FPGAs and modern SRAMs, and which uses mezzanine cards to interface with upstream detector components and an industry standard data link (S-LINK) within the system.
doi_str_mv 10.1109/TNS.2006.871782
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subjects Bandwidth
Commissioning
Computer buffers
Data links
Detectors
Field programmable gate arrays
FPGA based hardware
Hardware
Instruments
Mezzanines
Phase detection
Physics
Pulsars
real-time systems
Robustness
Running
Springs
trigger
Upstream
title CDF level 2 trigger upgrade
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