Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry

Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection c...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Veröffentlicht in:	Journal of electrostatics 2002, Vol.54 (1), p.3-21
Hauptverfasser:	Voldman, S., Hui, D., Young, D., Williams, R., Dreps, D., Howard, J., Sherony, M., Assaderaghi, F., Shahidi, G.
Format:	Artikel
Sprache:	eng
Schlagworte:	Active clamp ESD Protection Silicon-on-Insulator
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page	21
container_issue	1
container_start_page	3
container_title	Journal of electrostatics
container_volume	54
creator	Voldman, S. Hui, D. Young, D. Williams, R. Dreps, D. Howard, J. Sherony, M. Assaderaghi, F. Shahidi, G.
description	Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection circuits of silicon-on-insulator (SOI) active clamp networks, dynamic threshold MOSFET SOI ESD techniques and the synthesis of DTMOS concepts, ESD protection networks and active clamp circuitry for high-pin-count high-performance semiconductor chips.
doi_str_mv	10.1016/S0304-3886(01)00150-4
format	Article
fullrecord	<record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_27674801</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><els_id>S0304388601001504</els_id><sourcerecordid>27674801</sourcerecordid><originalsourceid>FETCH-LOGICAL-c338t-ec55e0f6c8f45490445f64aac896c86baf6a987a1e92e5a4d184e37ecfac5d623</originalsourceid><addsrcrecordid>eNqFkE1LAzEQhoMoWKs_QdiT6GE1aT42exLR-gFFD9VziLOzNLq7qUm20n_vthWvwsDA8LwvzEPIKaOXjDJ1Naecipxrrc4pu6CUSZqLPTJiuuC5LLjeJ6M_5JAcxfhBB0rLckSe565x4Lt8GNfFvrHJh6xad7Z1kKVFwLjwTZVN53dZh-nbh8-Y2a7KLCS3wgwa2y4zcAF6l8L6mBzUtol48rvH5O1--nr7mM9eHp5ub2Y5cK5TjiAl0lqBroUUJRVC1kpYC7ocburd1sqWurAMywlKKyqmBfICobYgKzXhY3K2610G_9VjTKZ1EbBpbIe-j2ZSqEJoygZQ7kAIPsaAtVkG19qwNoyajT2ztWc2agxlZmvPiCF3vcvh8MXKYTARHHaAlQsIyVTe_dPwAyw0d_0</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>27674801</pqid></control><display><type>article</type><title>Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry</title><source>Elsevier ScienceDirect Journals</source><creator>Voldman, S. ; Hui, D. ; Young, D. ; Williams, R. ; Dreps, D. ; Howard, J. ; Sherony, M. ; Assaderaghi, F. ; Shahidi, G.</creator><creatorcontrib>Voldman, S. ; Hui, D. ; Young, D. ; Williams, R. ; Dreps, D. ; Howard, J. ; Sherony, M. ; Assaderaghi, F. ; Shahidi, G.</creatorcontrib><description>Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection circuits of silicon-on-insulator (SOI) active clamp networks, dynamic threshold MOSFET SOI ESD techniques and the synthesis of DTMOS concepts, ESD protection networks and active clamp circuitry for high-pin-count high-performance semiconductor chips.</description><identifier>ISSN: 0304-3886</identifier><identifier>EISSN: 1873-5738</identifier><identifier>DOI: 10.1016/S0304-3886(01)00150-4</identifier><language>eng</language><publisher>Elsevier B.V</publisher><subject>Active clamp ; ESD ; Protection ; Silicon-on-Insulator</subject><ispartof>Journal of electrostatics, 2002, Vol.54 (1), p.3-21</ispartof><rights>2002 Elsevier Science B.V.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c338t-ec55e0f6c8f45490445f64aac896c86baf6a987a1e92e5a4d184e37ecfac5d623</citedby><cites>FETCH-LOGICAL-c338t-ec55e0f6c8f45490445f64aac896c86baf6a987a1e92e5a4d184e37ecfac5d623</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://www.sciencedirect.com/science/article/pii/S0304388601001504$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>314,776,780,3537,4010,27900,27901,27902,65306</link.rule.ids></links><search><creatorcontrib>Voldman, S.</creatorcontrib><creatorcontrib>Hui, D.</creatorcontrib><creatorcontrib>Young, D.</creatorcontrib><creatorcontrib>Williams, R.</creatorcontrib><creatorcontrib>Dreps, D.</creatorcontrib><creatorcontrib>Howard, J.</creatorcontrib><creatorcontrib>Sherony, M.</creatorcontrib><creatorcontrib>Assaderaghi, F.</creatorcontrib><creatorcontrib>Shahidi, G.</creatorcontrib><title>Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry</title><title>Journal of electrostatics</title><description>Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection circuits of silicon-on-insulator (SOI) active clamp networks, dynamic threshold MOSFET SOI ESD techniques and the synthesis of DTMOS concepts, ESD protection networks and active clamp circuitry for high-pin-count high-performance semiconductor chips.</description><subject>Active clamp</subject><subject>ESD</subject><subject>Protection</subject><subject>Silicon-on-Insulator</subject><issn>0304-3886</issn><issn>1873-5738</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2002</creationdate><recordtype>article</recordtype><recordid>eNqFkE1LAzEQhoMoWKs_QdiT6GE1aT42exLR-gFFD9VziLOzNLq7qUm20n_vthWvwsDA8LwvzEPIKaOXjDJ1Naecipxrrc4pu6CUSZqLPTJiuuC5LLjeJ6M_5JAcxfhBB0rLckSe565x4Lt8GNfFvrHJh6xad7Z1kKVFwLjwTZVN53dZh-nbh8-Y2a7KLCS3wgwa2y4zcAF6l8L6mBzUtol48rvH5O1--nr7mM9eHp5ub2Y5cK5TjiAl0lqBroUUJRVC1kpYC7ocburd1sqWurAMywlKKyqmBfICobYgKzXhY3K2610G_9VjTKZ1EbBpbIe-j2ZSqEJoygZQ7kAIPsaAtVkG19qwNoyajT2ztWc2agxlZmvPiCF3vcvh8MXKYTARHHaAlQsIyVTe_dPwAyw0d_0</recordid><startdate>2002</startdate><enddate>2002</enddate><creator>Voldman, S.</creator><creator>Hui, D.</creator><creator>Young, D.</creator><creator>Williams, R.</creator><creator>Dreps, D.</creator><creator>Howard, J.</creator><creator>Sherony, M.</creator><creator>Assaderaghi, F.</creator><creator>Shahidi, G.</creator><general>Elsevier B.V</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>2002</creationdate><title>Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry</title><author>Voldman, S. ; Hui, D. ; Young, D. ; Williams, R. ; Dreps, D. ; Howard, J. ; Sherony, M. ; Assaderaghi, F. ; Shahidi, G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c338t-ec55e0f6c8f45490445f64aac896c86baf6a987a1e92e5a4d184e37ecfac5d623</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2002</creationdate><topic>Active clamp</topic><topic>ESD</topic><topic>Protection</topic><topic>Silicon-on-Insulator</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Voldman, S.</creatorcontrib><creatorcontrib>Hui, D.</creatorcontrib><creatorcontrib>Young, D.</creatorcontrib><creatorcontrib>Williams, R.</creatorcontrib><creatorcontrib>Dreps, D.</creatorcontrib><creatorcontrib>Howard, J.</creatorcontrib><creatorcontrib>Sherony, M.</creatorcontrib><creatorcontrib>Assaderaghi, F.</creatorcontrib><creatorcontrib>Shahidi, G.</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Journal of electrostatics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Voldman, S.</au><au>Hui, D.</au><au>Young, D.</au><au>Williams, R.</au><au>Dreps, D.</au><au>Howard, J.</au><au>Sherony, M.</au><au>Assaderaghi, F.</au><au>Shahidi, G.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry</atitle><jtitle>Journal of electrostatics</jtitle><date>2002</date><risdate>2002</risdate><volume>54</volume><issue>1</issue><spage>3</spage><epage>21</epage><pages>3-21</pages><issn>0304-3886</issn><eissn>1873-5738</eissn><abstract>Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection circuits of silicon-on-insulator (SOI) active clamp networks, dynamic threshold MOSFET SOI ESD techniques and the synthesis of DTMOS concepts, ESD protection networks and active clamp circuitry for high-pin-count high-performance semiconductor chips.</abstract><pub>Elsevier B.V</pub><doi>10.1016/S0304-3886(01)00150-4</doi><tpages>19</tpages></addata></record>
fulltext	fulltext
identifier	ISSN: 0304-3886
ispartof	Journal of electrostatics, 2002, Vol.54 (1), p.3-21
issn	0304-3886 1873-5738
language	eng
recordid	cdi_proquest_miscellaneous_27674801
source	Elsevier ScienceDirect Journals
subjects	Active clamp ESD Protection Silicon-on-Insulator
title	Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-04T00%3A46%3A54IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Silicon-on-insulator%20dynamic%20threshold%20ESD%20networks%20and%20active%20clamp%20circuitry&rft.jtitle=Journal%20of%20electrostatics&rft.au=Voldman,%20S.&rft.date=2002&rft.volume=54&rft.issue=1&rft.spage=3&rft.epage=21&rft.pages=3-21&rft.issn=0304-3886&rft.eissn=1873-5738&rft_id=info:doi/10.1016/S0304-3886(01)00150-4&rft_dat=%3Cproquest_cross%3E27674801%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=27674801&rft_id=info:pmid/&rft_els_id=S0304388601001504&rfr_iscdi=true