Compensating for moderate effective throughput at the desktop

This article presents the design and development of a networking system architecture targeted to support high-speed TCP/IP communication over ATM. The discussed architecture has been developed in the form of an integrated system which incorporates state-of-the-art software and hardware subsystems, a...

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Veröffentlicht in:	IEEE communications magazine 2000-04, Vol.38 (4), p.128-135
Hauptverfasser:	Orphanos, G., Birbas, A., Petrellis, N., Mountzouris, L., Malataras, A., Goldfinch, A., Brosnan, L., Janko, U.
Format:	Magazinearticle
Sprache:	eng
Schlagworte:	Acceleration Adapters Architecture Asynchronous transfer mode Computer architecture Data communication Embedded system Embedded systems Hardware High speed IP (Internet Protocol) Operating systems Protocols Real time systems Stacks TCP (protocol) TCP/IP (protocol) TCPIP Throughput
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