Evaluation of image placement correction method for EB X-ray mask writing
An advanced image placement (IP) correction method that can compensate for localized distortions was developed to improve the IP accuracy of X-ray masks to the ultimate level. The method involves partitioning a chip into small cells, and shifting the positions of the patterns in each cell to the ide...
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| Veröffentlicht in: | Microelectronic engineering 2001-09, Vol.57, p.417-423 |
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| container_title | Microelectronic engineering |
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| creator | Watanabe, Toshifumi Ohki, Shigehisa Uchiyama, Shingo |
| description | An advanced image placement (IP) correction method that can compensate for localized distortions was developed to improve the IP accuracy of X-ray masks to the ultimate level. The method involves partitioning a chip into small cells, and shifting the positions of the patterns in each cell to the ideal ones that give the best IP accuracy. The amount of the shift is interpolated from the positions of the corners of cells. The expected attainable IP accuracy was investigated by employing two kinds of interpolation functions: a linear function and a 3rd-order spline function. It was found that linear interpolation always gives the best results. This method was used to correct the gate layer patterns of a 2-Gbit DRAM, and an IP accuracy of 3
σ(
X,
Y)=(10.5 nm, 9.4 nm) was obtained. These values exceed the requirements for the 100-nm technology node. |
| doi_str_mv | 10.1016/S0167-9317(01)00460-9 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_27040695</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><els_id>S0167931701004609</els_id><sourcerecordid>27040695</sourcerecordid><originalsourceid>FETCH-LOGICAL-c317t-348d0dc3bd412200595b2f6825bb9680838023922e48bdddb36e299872fbec743</originalsourceid><addsrcrecordid>eNqFkE2LFDEQhoOs4OzoTxBykEUPrZWv7vRp0WXUgQUPKngL6aR6N2t3ZzbpGZl_b-aD9eglRVFP5aUeQl4zeM-A1R--l6epWsGat8DeAcgaqvYZWTDdiEqpWl-QxRPyglzm_ACll6AXZL3a2WFr5xAnGnsaRnuHdDNYhyNOM3UxJXTH6YjzffS0j4muPtFfVbJ7Otr8m_5JYQ7T3UvyvLdDxlfnuiQ_P69-3Hytbr99Wd98vK1cSZ8rIbUH70TnJeMcQLWq432tueq6ttaghQYuWs5R6s5734kaedvqhvcdukaKJbk6_btJ8XGLeTZjyA6HwU4Yt9nwBiTUrSqgOoEuxZwT9maTyn1pbxiYgzhzFGcOVgwwcxRXuiV5cw6w2dmhT3ZyIf9bZkIq2RTs-oRhOXYXMJnsAk4OfTgoMz6G_wT9BVU3gJE</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>27040695</pqid></control><display><type>article</type><title>Evaluation of image placement correction method for EB X-ray mask writing</title><source>Elsevier ScienceDirect Journals Complete - AutoHoldings</source><creator>Watanabe, Toshifumi ; Ohki, Shigehisa ; Uchiyama, Shingo</creator><creatorcontrib>Watanabe, Toshifumi ; Ohki, Shigehisa ; Uchiyama, Shingo</creatorcontrib><description>An advanced image placement (IP) correction method that can compensate for localized distortions was developed to improve the IP accuracy of X-ray masks to the ultimate level. The method involves partitioning a chip into small cells, and shifting the positions of the patterns in each cell to the ideal ones that give the best IP accuracy. The amount of the shift is interpolated from the positions of the corners of cells. The expected attainable IP accuracy was investigated by employing two kinds of interpolation functions: a linear function and a 3rd-order spline function. It was found that linear interpolation always gives the best results. This method was used to correct the gate layer patterns of a 2-Gbit DRAM, and an IP accuracy of 3
σ(
X,
Y)=(10.5 nm, 9.4 nm) was obtained. These values exceed the requirements for the 100-nm technology node.</description><identifier>ISSN: 0167-9317</identifier><identifier>EISSN: 1873-5568</identifier><identifier>DOI: 10.1016/S0167-9317(01)00460-9</identifier><identifier>CODEN: MIENEF</identifier><language>eng</language><publisher>Amsterdam: Elsevier B.V</publisher><subject>Applied sciences ; Electronics ; Exact sciences and technology ; Microelectronic fabrication (materials and surfaces technology) ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><ispartof>Microelectronic engineering, 2001-09, Vol.57, p.417-423</ispartof><rights>2001</rights><rights>2001 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c317t-348d0dc3bd412200595b2f6825bb9680838023922e48bdddb36e299872fbec743</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://dx.doi.org/10.1016/S0167-9317(01)00460-9$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>309,310,314,780,784,789,790,3550,23930,23931,25140,27924,27925,45995</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=1134547$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Watanabe, Toshifumi</creatorcontrib><creatorcontrib>Ohki, Shigehisa</creatorcontrib><creatorcontrib>Uchiyama, Shingo</creatorcontrib><title>Evaluation of image placement correction method for EB X-ray mask writing</title><title>Microelectronic engineering</title><description>An advanced image placement (IP) correction method that can compensate for localized distortions was developed to improve the IP accuracy of X-ray masks to the ultimate level. The method involves partitioning a chip into small cells, and shifting the positions of the patterns in each cell to the ideal ones that give the best IP accuracy. The amount of the shift is interpolated from the positions of the corners of cells. The expected attainable IP accuracy was investigated by employing two kinds of interpolation functions: a linear function and a 3rd-order spline function. It was found that linear interpolation always gives the best results. This method was used to correct the gate layer patterns of a 2-Gbit DRAM, and an IP accuracy of 3
σ(
X,
Y)=(10.5 nm, 9.4 nm) was obtained. These values exceed the requirements for the 100-nm technology node.</description><subject>Applied sciences</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Microelectronic fabrication (materials and surfaces technology)</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><issn>0167-9317</issn><issn>1873-5568</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2001</creationdate><recordtype>article</recordtype><recordid>eNqFkE2LFDEQhoOs4OzoTxBykEUPrZWv7vRp0WXUgQUPKngL6aR6N2t3ZzbpGZl_b-aD9eglRVFP5aUeQl4zeM-A1R--l6epWsGat8DeAcgaqvYZWTDdiEqpWl-QxRPyglzm_ACll6AXZL3a2WFr5xAnGnsaRnuHdDNYhyNOM3UxJXTH6YjzffS0j4muPtFfVbJ7Otr8m_5JYQ7T3UvyvLdDxlfnuiQ_P69-3Hytbr99Wd98vK1cSZ8rIbUH70TnJeMcQLWq432tueq6ttaghQYuWs5R6s5734kaedvqhvcdukaKJbk6_btJ8XGLeTZjyA6HwU4Yt9nwBiTUrSqgOoEuxZwT9maTyn1pbxiYgzhzFGcOVgwwcxRXuiV5cw6w2dmhT3ZyIf9bZkIq2RTs-oRhOXYXMJnsAk4OfTgoMz6G_wT9BVU3gJE</recordid><startdate>20010901</startdate><enddate>20010901</enddate><creator>Watanabe, Toshifumi</creator><creator>Ohki, Shigehisa</creator><creator>Uchiyama, Shingo</creator><general>Elsevier B.V</general><general>Elsevier Science</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>20010901</creationdate><title>Evaluation of image placement correction method for EB X-ray mask writing</title><author>Watanabe, Toshifumi ; Ohki, Shigehisa ; Uchiyama, Shingo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c317t-348d0dc3bd412200595b2f6825bb9680838023922e48bdddb36e299872fbec743</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Applied sciences</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Microelectronic fabrication (materials and surfaces technology)</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Watanabe, Toshifumi</creatorcontrib><creatorcontrib>Ohki, Shigehisa</creatorcontrib><creatorcontrib>Uchiyama, Shingo</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Microelectronic engineering</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Watanabe, Toshifumi</au><au>Ohki, Shigehisa</au><au>Uchiyama, Shingo</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Evaluation of image placement correction method for EB X-ray mask writing</atitle><jtitle>Microelectronic engineering</jtitle><date>2001-09-01</date><risdate>2001</risdate><volume>57</volume><spage>417</spage><epage>423</epage><pages>417-423</pages><issn>0167-9317</issn><eissn>1873-5568</eissn><coden>MIENEF</coden><abstract>An advanced image placement (IP) correction method that can compensate for localized distortions was developed to improve the IP accuracy of X-ray masks to the ultimate level. The method involves partitioning a chip into small cells, and shifting the positions of the patterns in each cell to the ideal ones that give the best IP accuracy. The amount of the shift is interpolated from the positions of the corners of cells. The expected attainable IP accuracy was investigated by employing two kinds of interpolation functions: a linear function and a 3rd-order spline function. It was found that linear interpolation always gives the best results. This method was used to correct the gate layer patterns of a 2-Gbit DRAM, and an IP accuracy of 3
σ(
X,
Y)=(10.5 nm, 9.4 nm) was obtained. These values exceed the requirements for the 100-nm technology node.</abstract><cop>Amsterdam</cop><pub>Elsevier B.V</pub><doi>10.1016/S0167-9317(01)00460-9</doi><tpages>7</tpages></addata></record> |
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| ispartof | Microelectronic engineering, 2001-09, Vol.57, p.417-423 |
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| source | Elsevier ScienceDirect Journals Complete - AutoHoldings |
| subjects | Applied sciences Electronics Exact sciences and technology Microelectronic fabrication (materials and surfaces technology) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices |
| title | Evaluation of image placement correction method for EB X-ray mask writing |
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