Developing an architecture validation suite. Application to the PowerPC architecture

This paper describes the efforts made and the results of creating an Architecture Validation Suite for the PowerPC architecture. Although many functional test suites are available for multiple architectures, little has been published on how these suites are developed and how their quality should be...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Fournier, Laurent, Koyfman, Anatoly, Levinger, Moshe
Format: Tagungsbericht
Sprache:eng
Online-Zugang:Volltext
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