CAM-based VLSI architectures for dynamic Huffman coding

The dynamic Huffman coding is a data compression technique, and famous for its flexibility. However, it has not been available for real-time applications because the adaption process is complex. In this paper, we proposed the architectures for dynamic Huffman coding. Both of the encoder and decoder...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on consumer electronics 1994-08, Vol.40 (3), p.282-289
Hauptverfasser: Liu, Liang-Ying, Wang, Jhing-Fa, Wang, Ruey-Jen, Lee, Jau-Yien
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 289
container_issue 3
container_start_page 282
container_title IEEE transactions on consumer electronics
container_volume 40
creator Liu, Liang-Ying
Wang, Jhing-Fa
Wang, Ruey-Jen
Lee, Jau-Yien
description The dynamic Huffman coding is a data compression technique, and famous for its flexibility. However, it has not been available for real-time applications because the adaption process is complex. In this paper, we proposed the architectures for dynamic Huffman coding. Both of the encoder and decoder are constructed by using the CAM-based memory modules. These memory modules parallelly perform the adaption, process so that the coding can be efficiently executed. The encoder with the code table containing 32 symbols has been implemented. The simulation results show that the encoder can yield a input throughput of 40 Mbps operating at 40 MHz with 50% compression ratio.< >
doi_str_mv 10.1109/30.320807
format Article
fullrecord <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_miscellaneous_26347105</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>320807</ieee_id><sourcerecordid>26347105</sourcerecordid><originalsourceid>FETCH-LOGICAL-c374t-7886152a44904628b8871c09382dc0bd7748fbc3282ab26af996628b6e8dcaa03</originalsourceid><addsrcrecordid>eNqF0DtPwzAUBWALgUQpDKxMmZAYUq4fsa_HqgJaqYiBx2o5jg1BTVLsZOi_p1UqVqYznE9nOIRcU5hRCvqew4wzQFAnZEKLAnNBmTolEwCNOQfJz8lFSt8AVBQMJ0Qt5s95aZOvso_16yqz0X3VvXf9EH3KQhezatfapnbZcgihsW3muqpuPy_JWbCb5K-OOSXvjw9vi2W-fnlaLebr3HEl-lwhSlowK4QGIRmWiIo60BxZ5aCslBIYSscZMlsyaYPW8sCkx8pZC3xKbsfdbex-Bp9609TJ-c3Gtr4bkmFIlQbU_0PJhaJQ7OHdCF3sUoo-mG2sGxt3hoI5fGg4mPHDvb0Zbe29_3PH8hd2yWkc</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>26347105</pqid></control><display><type>article</type><title>CAM-based VLSI architectures for dynamic Huffman coding</title><source>IEEE Electronic Library (IEL)</source><creator>Liu, Liang-Ying ; Wang, Jhing-Fa ; Wang, Ruey-Jen ; Lee, Jau-Yien</creator><creatorcontrib>Liu, Liang-Ying ; Wang, Jhing-Fa ; Wang, Ruey-Jen ; Lee, Jau-Yien</creatorcontrib><description>The dynamic Huffman coding is a data compression technique, and famous for its flexibility. However, it has not been available for real-time applications because the adaption process is complex. In this paper, we proposed the architectures for dynamic Huffman coding. Both of the encoder and decoder are constructed by using the CAM-based memory modules. These memory modules parallelly perform the adaption, process so that the coding can be efficiently executed. The encoder with the code table containing 32 symbols has been implemented. The simulation results show that the encoder can yield a input throughput of 40 Mbps operating at 40 MHz with 50% compression ratio.&lt; &gt;</description><identifier>ISSN: 0098-3063</identifier><identifier>EISSN: 1558-4127</identifier><identifier>DOI: 10.1109/30.320807</identifier><identifier>CODEN: ITCEDA</identifier><language>eng</language><publisher>IEEE</publisher><subject>Bandwidth ; Circuits ; CMOS technology ; Communication networks ; Decoding ; DH-HEMTs ; Educational institutions ; Huffman coding ; Throughput ; Very large scale integration</subject><ispartof>IEEE transactions on consumer electronics, 1994-08, Vol.40 (3), p.282-289</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c374t-7886152a44904628b8871c09382dc0bd7748fbc3282ab26af996628b6e8dcaa03</citedby><cites>FETCH-LOGICAL-c374t-7886152a44904628b8871c09382dc0bd7748fbc3282ab26af996628b6e8dcaa03</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/320807$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/320807$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Liu, Liang-Ying</creatorcontrib><creatorcontrib>Wang, Jhing-Fa</creatorcontrib><creatorcontrib>Wang, Ruey-Jen</creatorcontrib><creatorcontrib>Lee, Jau-Yien</creatorcontrib><title>CAM-based VLSI architectures for dynamic Huffman coding</title><title>IEEE transactions on consumer electronics</title><addtitle>T-CE</addtitle><description>The dynamic Huffman coding is a data compression technique, and famous for its flexibility. However, it has not been available for real-time applications because the adaption process is complex. In this paper, we proposed the architectures for dynamic Huffman coding. Both of the encoder and decoder are constructed by using the CAM-based memory modules. These memory modules parallelly perform the adaption, process so that the coding can be efficiently executed. The encoder with the code table containing 32 symbols has been implemented. The simulation results show that the encoder can yield a input throughput of 40 Mbps operating at 40 MHz with 50% compression ratio.&lt; &gt;</description><subject>Bandwidth</subject><subject>Circuits</subject><subject>CMOS technology</subject><subject>Communication networks</subject><subject>Decoding</subject><subject>DH-HEMTs</subject><subject>Educational institutions</subject><subject>Huffman coding</subject><subject>Throughput</subject><subject>Very large scale integration</subject><issn>0098-3063</issn><issn>1558-4127</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1994</creationdate><recordtype>article</recordtype><recordid>eNqF0DtPwzAUBWALgUQpDKxMmZAYUq4fsa_HqgJaqYiBx2o5jg1BTVLsZOi_p1UqVqYznE9nOIRcU5hRCvqew4wzQFAnZEKLAnNBmTolEwCNOQfJz8lFSt8AVBQMJ0Qt5s95aZOvso_16yqz0X3VvXf9EH3KQhezatfapnbZcgihsW3muqpuPy_JWbCb5K-OOSXvjw9vi2W-fnlaLebr3HEl-lwhSlowK4QGIRmWiIo60BxZ5aCslBIYSscZMlsyaYPW8sCkx8pZC3xKbsfdbex-Bp9609TJ-c3Gtr4bkmFIlQbU_0PJhaJQ7OHdCF3sUoo-mG2sGxt3hoI5fGg4mPHDvb0Zbe29_3PH8hd2yWkc</recordid><startdate>19940801</startdate><enddate>19940801</enddate><creator>Liu, Liang-Ying</creator><creator>Wang, Jhing-Fa</creator><creator>Wang, Ruey-Jen</creator><creator>Lee, Jau-Yien</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>19940801</creationdate><title>CAM-based VLSI architectures for dynamic Huffman coding</title><author>Liu, Liang-Ying ; Wang, Jhing-Fa ; Wang, Ruey-Jen ; Lee, Jau-Yien</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c374t-7886152a44904628b8871c09382dc0bd7748fbc3282ab26af996628b6e8dcaa03</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1994</creationdate><topic>Bandwidth</topic><topic>Circuits</topic><topic>CMOS technology</topic><topic>Communication networks</topic><topic>Decoding</topic><topic>DH-HEMTs</topic><topic>Educational institutions</topic><topic>Huffman coding</topic><topic>Throughput</topic><topic>Very large scale integration</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Liu, Liang-Ying</creatorcontrib><creatorcontrib>Wang, Jhing-Fa</creatorcontrib><creatorcontrib>Wang, Ruey-Jen</creatorcontrib><creatorcontrib>Lee, Jau-Yien</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts – Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>ANTE: Abstracts in New Technology &amp; Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on consumer electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Liu, Liang-Ying</au><au>Wang, Jhing-Fa</au><au>Wang, Ruey-Jen</au><au>Lee, Jau-Yien</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>CAM-based VLSI architectures for dynamic Huffman coding</atitle><jtitle>IEEE transactions on consumer electronics</jtitle><stitle>T-CE</stitle><date>1994-08-01</date><risdate>1994</risdate><volume>40</volume><issue>3</issue><spage>282</spage><epage>289</epage><pages>282-289</pages><issn>0098-3063</issn><eissn>1558-4127</eissn><coden>ITCEDA</coden><abstract>The dynamic Huffman coding is a data compression technique, and famous for its flexibility. However, it has not been available for real-time applications because the adaption process is complex. In this paper, we proposed the architectures for dynamic Huffman coding. Both of the encoder and decoder are constructed by using the CAM-based memory modules. These memory modules parallelly perform the adaption, process so that the coding can be efficiently executed. The encoder with the code table containing 32 symbols has been implemented. The simulation results show that the encoder can yield a input throughput of 40 Mbps operating at 40 MHz with 50% compression ratio.&lt; &gt;</abstract><pub>IEEE</pub><doi>10.1109/30.320807</doi><tpages>8</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 0098-3063
ispartof IEEE transactions on consumer electronics, 1994-08, Vol.40 (3), p.282-289
issn 0098-3063
1558-4127
language eng
recordid cdi_proquest_miscellaneous_26347105
source IEEE Electronic Library (IEL)
subjects Bandwidth
Circuits
CMOS technology
Communication networks
Decoding
DH-HEMTs
Educational institutions
Huffman coding
Throughput
Very large scale integration
title CAM-based VLSI architectures for dynamic Huffman coding
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-09T16%3A22%3A20IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=CAM-based%20VLSI%20architectures%20for%20dynamic%20Huffman%20coding&rft.jtitle=IEEE%20transactions%20on%20consumer%20electronics&rft.au=Liu,%20Liang-Ying&rft.date=1994-08-01&rft.volume=40&rft.issue=3&rft.spage=282&rft.epage=289&rft.pages=282-289&rft.issn=0098-3063&rft.eissn=1558-4127&rft.coden=ITCEDA&rft_id=info:doi/10.1109/30.320807&rft_dat=%3Cproquest_RIE%3E26347105%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=26347105&rft_id=info:pmid/&rft_ieee_id=320807&rfr_iscdi=true