SOI for a 1-volt CMOS technology and application to a 512Kb SRAM with 3.5 ns access time

In this paper a CMOS technology that is optimum for low voltage (in the 1-volt range) applications is presented. Thin but undepleted SOI is used as the substrate, which gives low junction capacitance and no body effect. Furthermore floating body effects causes a reduction of subthreshold slope at hi...

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Bibliographische Detailangaben

Hauptverfasser:	Shahidi, G G, Ning, T H, Chappell, T I, Comfort, J H, Chappell, B A, Franch, R, Anderson, C J, Cook, P W, Schuster, S E, Rosenfield, M G, Polcari, M R, Dennard, R H, Davari, B
Format:	Tagungsbericht
Sprache:	eng
Online-Zugang:	Volltext
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