Video communications using rapidly reconfigurable hardware

Video coding has been implemented by using rapid reconfiguration to time share hardware for several sequential stages. This allows the chip area to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control need...

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Veröffentlicht in:	IEEE transactions on circuits and systems for video technology 1995-12, Vol.5 (6), p.565-567
Hauptverfasser:	Villasenor, J., Jones, C., Schoner, B.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Codecs Electronics Exact sciences and technology Field programmable gate arrays Hardware Image coding Integrated circuits Integrated circuits by function (including memories and processors) Logic arrays Partitioning algorithms Reconfigurable logic Runtime Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Video coding Wireless communication
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