Video communications using rapidly reconfigurable hardware
Video coding has been implemented by using rapid reconfiguration to time share hardware for several sequential stages. This allows the chip area to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control need...
Gespeichert in:
| Veröffentlicht in: | IEEE transactions on circuits and systems for video technology 1995-12, Vol.5 (6), p.565-567 |
|---|---|
| Hauptverfasser: | , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 567 |
|---|---|
| container_issue | 6 |
| container_start_page | 565 |
| container_title | IEEE transactions on circuits and systems for video technology |
| container_volume | 5 |
| creator | Villasenor, J. Jones, C. Schoner, B. |
| description | Video coding has been implemented by using rapid reconfiguration to time share hardware for several sequential stages. This allows the chip area to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of video applications in which temporal algorithm partitioning and rapid adaptivity are feasible and desired. |
| doi_str_mv | 10.1109/76.475899 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_miscellaneous_26067084</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>475899</ieee_id><sourcerecordid>26067084</sourcerecordid><originalsourceid>FETCH-LOGICAL-c337t-603443b5ab05c0d2ccb352e6e6b4e63126804d2bd065950a82e7961c84f94bee3</originalsourceid><addsrcrecordid>eNqFkE1Lw0AQhhdRsFYPXj3lIIKH1NnP7HqT4hcUvKjXsNlM6kqSrbsN0n9vS0qvnmZgnvcZeAm5pDCjFMxdoWaikNqYIzKhUuqcMZDH2x0kzTWj8pScpfQNQIUWxYTcf_oaQ-ZC1w29d3btQ5-yIfl-mUW78nW7ySK60Dd-OURbtZh92Vj_2ojn5KSxbcKL_ZySj6fH9_lLvnh7fp0_LHLHebHOFXAheCVtBdJBzZyruGSoUFUCFadMaRA1q2pQ0kiwmmFhFHVaNEZUiHxKbkbvKoafAdO67Hxy2La2xzCkkmllBAfxP6hAFaB34O0IuhhSitiUq-g7GzclhXJXY1mocqxxy17vpTY52zbR9s6nQ4AZqcffVyPmEfFw3Tv-AAdWeQk</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>26067084</pqid></control><display><type>article</type><title>Video communications using rapidly reconfigurable hardware</title><source>IEEE Electronic Library (IEL)</source><creator>Villasenor, J. ; Jones, C. ; Schoner, B.</creator><creatorcontrib>Villasenor, J. ; Jones, C. ; Schoner, B.</creatorcontrib><description>Video coding has been implemented by using rapid reconfiguration to time share hardware for several sequential stages. This allows the chip area to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of video applications in which temporal algorithm partitioning and rapid adaptivity are feasible and desired.</description><identifier>ISSN: 1051-8215</identifier><identifier>EISSN: 1558-2205</identifier><identifier>DOI: 10.1109/76.475899</identifier><identifier>CODEN: ITCTEM</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Codecs ; Electronics ; Exact sciences and technology ; Field programmable gate arrays ; Hardware ; Image coding ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Logic arrays ; Partitioning algorithms ; Reconfigurable logic ; Runtime ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Video coding ; Wireless communication</subject><ispartof>IEEE transactions on circuits and systems for video technology, 1995-12, Vol.5 (6), p.565-567</ispartof><rights>1996 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c337t-603443b5ab05c0d2ccb352e6e6b4e63126804d2bd065950a82e7961c84f94bee3</citedby><cites>FETCH-LOGICAL-c337t-603443b5ab05c0d2ccb352e6e6b4e63126804d2bd065950a82e7961c84f94bee3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/475899$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27922,27923,54756</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/475899$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=2958304$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Villasenor, J.</creatorcontrib><creatorcontrib>Jones, C.</creatorcontrib><creatorcontrib>Schoner, B.</creatorcontrib><title>Video communications using rapidly reconfigurable hardware</title><title>IEEE transactions on circuits and systems for video technology</title><addtitle>TCSVT</addtitle><description>Video coding has been implemented by using rapid reconfiguration to time share hardware for several sequential stages. This allows the chip area to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of video applications in which temporal algorithm partitioning and rapid adaptivity are feasible and desired.</description><subject>Applied sciences</subject><subject>Codecs</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Field programmable gate arrays</subject><subject>Hardware</subject><subject>Image coding</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Logic arrays</subject><subject>Partitioning algorithms</subject><subject>Reconfigurable logic</subject><subject>Runtime</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Video coding</subject><subject>Wireless communication</subject><issn>1051-8215</issn><issn>1558-2205</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1995</creationdate><recordtype>article</recordtype><recordid>eNqFkE1Lw0AQhhdRsFYPXj3lIIKH1NnP7HqT4hcUvKjXsNlM6kqSrbsN0n9vS0qvnmZgnvcZeAm5pDCjFMxdoWaikNqYIzKhUuqcMZDH2x0kzTWj8pScpfQNQIUWxYTcf_oaQ-ZC1w29d3btQ5-yIfl-mUW78nW7ySK60Dd-OURbtZh92Vj_2ojn5KSxbcKL_ZySj6fH9_lLvnh7fp0_LHLHebHOFXAheCVtBdJBzZyruGSoUFUCFadMaRA1q2pQ0kiwmmFhFHVaNEZUiHxKbkbvKoafAdO67Hxy2La2xzCkkmllBAfxP6hAFaB34O0IuhhSitiUq-g7GzclhXJXY1mocqxxy17vpTY52zbR9s6nQ4AZqcffVyPmEfFw3Tv-AAdWeQk</recordid><startdate>19951201</startdate><enddate>19951201</enddate><creator>Villasenor, J.</creator><creator>Jones, C.</creator><creator>Schoner, B.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>19951201</creationdate><title>Video communications using rapidly reconfigurable hardware</title><author>Villasenor, J. ; Jones, C. ; Schoner, B.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c337t-603443b5ab05c0d2ccb352e6e6b4e63126804d2bd065950a82e7961c84f94bee3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1995</creationdate><topic>Applied sciences</topic><topic>Codecs</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Field programmable gate arrays</topic><topic>Hardware</topic><topic>Image coding</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Logic arrays</topic><topic>Partitioning algorithms</topic><topic>Reconfigurable logic</topic><topic>Runtime</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Video coding</topic><topic>Wireless communication</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Villasenor, J.</creatorcontrib><creatorcontrib>Jones, C.</creatorcontrib><creatorcontrib>Schoner, B.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEEE transactions on circuits and systems for video technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Villasenor, J.</au><au>Jones, C.</au><au>Schoner, B.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Video communications using rapidly reconfigurable hardware</atitle><jtitle>IEEE transactions on circuits and systems for video technology</jtitle><stitle>TCSVT</stitle><date>1995-12-01</date><risdate>1995</risdate><volume>5</volume><issue>6</issue><spage>565</spage><epage>567</epage><pages>565-567</pages><issn>1051-8215</issn><eissn>1558-2205</eissn><coden>ITCTEM</coden><abstract>Video coding has been implemented by using rapid reconfiguration to time share hardware for several sequential stages. This allows the chip area to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of video applications in which temporal algorithm partitioning and rapid adaptivity are feasible and desired.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/76.475899</doi><tpages>3</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1051-8215 |
| ispartof | IEEE transactions on circuits and systems for video technology, 1995-12, Vol.5 (6), p.565-567 |
| issn | 1051-8215 1558-2205 |
| language | eng |
| recordid | cdi_proquest_miscellaneous_26067084 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Codecs Electronics Exact sciences and technology Field programmable gate arrays Hardware Image coding Integrated circuits Integrated circuits by function (including memories and processors) Logic arrays Partitioning algorithms Reconfigurable logic Runtime Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Video coding Wireless communication |
| title | Video communications using rapidly reconfigurable hardware |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T05%3A54%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Video%20communications%20using%20rapidly%20reconfigurable%20hardware&rft.jtitle=IEEE%20transactions%20on%20circuits%20and%20systems%20for%20video%20technology&rft.au=Villasenor,%20J.&rft.date=1995-12-01&rft.volume=5&rft.issue=6&rft.spage=565&rft.epage=567&rft.pages=565-567&rft.issn=1051-8215&rft.eissn=1558-2205&rft.coden=ITCTEM&rft_id=info:doi/10.1109/76.475899&rft_dat=%3Cproquest_RIE%3E26067084%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=26067084&rft_id=info:pmid/&rft_ieee_id=475899&rfr_iscdi=true |