Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging
The evolution of the gate current-voltage (I/sub g/-V/sub gs/) characteristics of n-MOSFETs induced by DC stresses at different gate voltage over drain voltage (V/sub ds/) ratios is studied by the floating-gate (FG) measurement technique. It is shown that the I/sub g/-V/sub gs/ curves are always low...
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Veröffentlicht in: | IEEE electron device letters 1990-09, Vol.11 (9), p.406-408 |
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creator | Marchetaux, J.-C. Bourcerie, M. Boudou, A. Vuillaume, D. |
description | The evolution of the gate current-voltage (I/sub g/-V/sub gs/) characteristics of n-MOSFETs induced by DC stresses at different gate voltage over drain voltage (V/sub ds/) ratios is studied by the floating-gate (FG) measurement technique. It is shown that the I/sub g/-V/sub gs/ curves are always lowered after aging, and that the kinetics are dependent on the aging conditions. A time power law is representative of the V/sub gs/=V/sub ds/ case. It is demonstrated that electron traps are created in the oxide by both hot-hole and hot-electron injection stresses. They are not present in the devices before aging. They can be easily charged and discharged by short electron and hole injections, respectively.< > |
doi_str_mv | 10.1109/55.62971 |
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It is shown that the I/sub g/-V/sub gs/ curves are always lowered after aging, and that the kinetics are dependent on the aging conditions. A time power law is representative of the V/sub gs/=V/sub ds/ case. It is demonstrated that electron traps are created in the oxide by both hot-hole and hot-electron injection stresses. They are not present in the devices before aging. They can be easily charged and discharged by short electron and hole injections, respectively.< ></description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/55.62971</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Aging ; Applied sciences ; Charge carrier processes ; Electron traps ; Electronics ; Exact sciences and technology ; Hot carriers ; Kinetic theory ; Measurement techniques ; MOSFET circuits ; Secondary generated hot electron injection ; Semiconductor electronics. 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It is shown that the I/sub g/-V/sub gs/ curves are always lowered after aging, and that the kinetics are dependent on the aging conditions. A time power law is representative of the V/sub gs/=V/sub ds/ case. It is demonstrated that electron traps are created in the oxide by both hot-hole and hot-electron injection stresses. They are not present in the devices before aging. They can be easily charged and discharged by short electron and hole injections, respectively.< ></description><subject>Aging</subject><subject>Applied sciences</subject><subject>Charge carrier processes</subject><subject>Electron traps</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Hot carriers</subject><subject>Kinetic theory</subject><subject>Measurement techniques</subject><subject>MOSFET circuits</subject><subject>Secondary generated hot electron injection</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Stress</subject><subject>Transistors</subject><subject>Voltage</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1990</creationdate><recordtype>article</recordtype><recordid>eNqFkT1PwzAQhi0EEqUgsbJlAbG42PFXMlYVX1JRB2COXOfSBqVxsR1Q_z0mKTAy-az3ucdnHULnlEwoJfmNEBOZ5ooeoBEVIsNESHaIRkRxihkl8hideP9GCOVc8RH6nG63TW10qG2b2CoJa0iqxsZ7u8IrHSAJYNZt_d7FyvaxD125-2Fb_LR4vrt9SXrWdM5BGxL4sE3XK8uhb20DNtq5GlyiV9F9io4q3Xg4259j9Botswc8X9w_zqZzbBgTAZcQJ1U6l5TLMjfMUJlTDcuKGK2YJllV8pizZVqmy5xRBRB5SSRTJWjC2BhdDd6ts_EPPhSb2htoGt2C7XyRZiLlSmX_gyJL4yx5BK8H0DjrvYOq2Lp6o92uoKT4XkEhRNGvIKKXe6f2RjeV062p_R-fs_g2l5G7GLgaAH7jwfEF8duNzA</recordid><startdate>19900901</startdate><enddate>19900901</enddate><creator>Marchetaux, J.-C.</creator><creator>Bourcerie, M.</creator><creator>Boudou, A.</creator><creator>Vuillaume, D.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19900901</creationdate><title>Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging</title><author>Marchetaux, J.-C. ; Bourcerie, M. ; Boudou, A. ; Vuillaume, D.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c335t-de0017a96146d9c3c1691aebf0ca73a08fd417a3b2d2b9317ee01760637dea033</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1990</creationdate><topic>Aging</topic><topic>Applied sciences</topic><topic>Charge carrier processes</topic><topic>Electron traps</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Hot carriers</topic><topic>Kinetic theory</topic><topic>Measurement techniques</topic><topic>MOSFET circuits</topic><topic>Secondary generated hot electron injection</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Stress</topic><topic>Transistors</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Marchetaux, J.-C.</creatorcontrib><creatorcontrib>Bourcerie, M.</creatorcontrib><creatorcontrib>Boudou, A.</creatorcontrib><creatorcontrib>Vuillaume, D.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Marchetaux, J.-C.</au><au>Bourcerie, M.</au><au>Boudou, A.</au><au>Vuillaume, D.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>1990-09-01</date><risdate>1990</risdate><volume>11</volume><issue>9</issue><spage>406</spage><epage>408</epage><pages>406-408</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>The evolution of the gate current-voltage (I/sub g/-V/sub gs/) characteristics of n-MOSFETs induced by DC stresses at different gate voltage over drain voltage (V/sub ds/) ratios is studied by the floating-gate (FG) measurement technique. It is shown that the I/sub g/-V/sub gs/ curves are always lowered after aging, and that the kinetics are dependent on the aging conditions. A time power law is representative of the V/sub gs/=V/sub ds/ case. It is demonstrated that electron traps are created in the oxide by both hot-hole and hot-electron injection stresses. They are not present in the devices before aging. They can be easily charged and discharged by short electron and hole injections, respectively.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/55.62971</doi><tpages>3</tpages></addata></record> |
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subjects | Aging Applied sciences Charge carrier processes Electron traps Electronics Exact sciences and technology Hot carriers Kinetic theory Measurement techniques MOSFET circuits Secondary generated hot electron injection Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Stress Transistors Voltage |
title | Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging |
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