Graded-junction gate/n super(-) overlapped LDD MOSFET structures for high hot-carrier reliability
A newly developed gate/n super(-) overlapped LDD MOSFET has been investigated. The MOSFET was fabricated by an oblique rotating ion implantation technique. A new formula of impurity ion profile was derived to analyze the lowering of substrate current and improvement of the degradation caused by hot-...
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Veröffentlicht in: | IEEE transactions on electron devices 1991-01, Vol.38 (12), p.2647-2656 |
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creator | Okumura, Y Kunikiyo, T Ogoh, I Genjo, H Inuishi, M Nagatomo, M Matsukawa, T |
description | A newly developed gate/n super(-) overlapped LDD MOSFET has been investigated. The MOSFET was fabricated by an oblique rotating ion implantation technique. A new formula of impurity ion profile was derived to analyze the lowering of substrate current and improvement of the degradation caused by hot-carrier effect. It was proved that impurity ion profile near the drain edge is remarkably graded in the direction both along channel and toward substrate even just after the implantation, so that maximum lateral electric field is remarkably relaxed as compared with conventional LDD MOSFET. |
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fullrecord | <record><control><sourceid>proquest</sourceid><recordid>TN_cdi_proquest_miscellaneous_25235310</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>25235310</sourcerecordid><originalsourceid>FETCH-proquest_miscellaneous_252353103</originalsourceid><addsrcrecordid>eNqNjLsKwjAUQDMo-PyHO4kOwbaxorPPQXHQvcT22kZiU-9NBP9eBz_A6XDgcFqiG0XxQi7VQnVEj_n-1flslnSF3pEusJD3UOfeuBpK7XFaA4cGaSwn4F5IVjcNFnBYr-F4Om83F2BPIfeBkOHmCCpTVlA5L3NNZJCA0Bp9Ndb490C0b9oyDn_si9H3sNrLhtwzIPvsYThHa3WNLnCWpIlKVRypv8MP7fNG7Q</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>25235310</pqid></control><display><type>article</type><title>Graded-junction gate/n super(-) overlapped LDD MOSFET structures for high hot-carrier reliability</title><source>IEEE Electronic Library (IEL)</source><creator>Okumura, Y ; Kunikiyo, T ; Ogoh, I ; Genjo, H ; Inuishi, M ; Nagatomo, M ; Matsukawa, T</creator><creatorcontrib>Okumura, Y ; Kunikiyo, T ; Ogoh, I ; Genjo, H ; Inuishi, M ; Nagatomo, M ; Matsukawa, T</creatorcontrib><description>A newly developed gate/n super(-) overlapped LDD MOSFET has been investigated. The MOSFET was fabricated by an oblique rotating ion implantation technique. A new formula of impurity ion profile was derived to analyze the lowering of substrate current and improvement of the degradation caused by hot-carrier effect. It was proved that impurity ion profile near the drain edge is remarkably graded in the direction both along channel and toward substrate even just after the implantation, so that maximum lateral electric field is remarkably relaxed as compared with conventional LDD MOSFET.</description><identifier>ISSN: 0018-9383</identifier><language>eng</language><ispartof>IEEE transactions on electron devices, 1991-01, Vol.38 (12), p.2647-2656</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780</link.rule.ids></links><search><creatorcontrib>Okumura, Y</creatorcontrib><creatorcontrib>Kunikiyo, T</creatorcontrib><creatorcontrib>Ogoh, I</creatorcontrib><creatorcontrib>Genjo, H</creatorcontrib><creatorcontrib>Inuishi, M</creatorcontrib><creatorcontrib>Nagatomo, M</creatorcontrib><creatorcontrib>Matsukawa, T</creatorcontrib><title>Graded-junction gate/n super(-) overlapped LDD MOSFET structures for high hot-carrier reliability</title><title>IEEE transactions on electron devices</title><description>A newly developed gate/n super(-) overlapped LDD MOSFET has been investigated. The MOSFET was fabricated by an oblique rotating ion implantation technique. A new formula of impurity ion profile was derived to analyze the lowering of substrate current and improvement of the degradation caused by hot-carrier effect. It was proved that impurity ion profile near the drain edge is remarkably graded in the direction both along channel and toward substrate even just after the implantation, so that maximum lateral electric field is remarkably relaxed as compared with conventional LDD MOSFET.</description><issn>0018-9383</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1991</creationdate><recordtype>article</recordtype><recordid>eNqNjLsKwjAUQDMo-PyHO4kOwbaxorPPQXHQvcT22kZiU-9NBP9eBz_A6XDgcFqiG0XxQi7VQnVEj_n-1flslnSF3pEusJD3UOfeuBpK7XFaA4cGaSwn4F5IVjcNFnBYr-F4Om83F2BPIfeBkOHmCCpTVlA5L3NNZJCA0Bp9Ndb490C0b9oyDn_si9H3sNrLhtwzIPvsYThHa3WNLnCWpIlKVRypv8MP7fNG7Q</recordid><startdate>19910101</startdate><enddate>19910101</enddate><creator>Okumura, Y</creator><creator>Kunikiyo, T</creator><creator>Ogoh, I</creator><creator>Genjo, H</creator><creator>Inuishi, M</creator><creator>Nagatomo, M</creator><creator>Matsukawa, T</creator><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19910101</creationdate><title>Graded-junction gate/n super(-) overlapped LDD MOSFET structures for high hot-carrier reliability</title><author>Okumura, Y ; Kunikiyo, T ; Ogoh, I ; Genjo, H ; Inuishi, M ; Nagatomo, M ; Matsukawa, T</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-proquest_miscellaneous_252353103</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1991</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Okumura, Y</creatorcontrib><creatorcontrib>Kunikiyo, T</creatorcontrib><creatorcontrib>Ogoh, I</creatorcontrib><creatorcontrib>Genjo, H</creatorcontrib><creatorcontrib>Inuishi, M</creatorcontrib><creatorcontrib>Nagatomo, M</creatorcontrib><creatorcontrib>Matsukawa, T</creatorcontrib><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Okumura, Y</au><au>Kunikiyo, T</au><au>Ogoh, I</au><au>Genjo, H</au><au>Inuishi, M</au><au>Nagatomo, M</au><au>Matsukawa, T</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Graded-junction gate/n super(-) overlapped LDD MOSFET structures for high hot-carrier reliability</atitle><jtitle>IEEE transactions on electron devices</jtitle><date>1991-01-01</date><risdate>1991</risdate><volume>38</volume><issue>12</issue><spage>2647</spage><epage>2656</epage><pages>2647-2656</pages><issn>0018-9383</issn><abstract>A newly developed gate/n super(-) overlapped LDD MOSFET has been investigated. The MOSFET was fabricated by an oblique rotating ion implantation technique. A new formula of impurity ion profile was derived to analyze the lowering of substrate current and improvement of the degradation caused by hot-carrier effect. It was proved that impurity ion profile near the drain edge is remarkably graded in the direction both along channel and toward substrate even just after the implantation, so that maximum lateral electric field is remarkably relaxed as compared with conventional LDD MOSFET.</abstract></addata></record> |
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title | Graded-junction gate/n super(-) overlapped LDD MOSFET structures for high hot-carrier reliability |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T12%3A31%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Graded-junction%20gate/n%20super(-)%20overlapped%20LDD%20MOSFET%20structures%20for%20high%20hot-carrier%20reliability&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Okumura,%20Y&rft.date=1991-01-01&rft.volume=38&rft.issue=12&rft.spage=2647&rft.epage=2656&rft.pages=2647-2656&rft.issn=0018-9383&rft_id=info:doi/&rft_dat=%3Cproquest%3E25235310%3C/proquest%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=25235310&rft_id=info:pmid/&rfr_iscdi=true |