Dual-type CMOS gate electrodes by dopant diffusion from silicide
Dual work function gate electrodes have been implemented in a 1- mu m CMOS process. Dopant atoms were implanted into tungsten silicide simultaneously with the source-drain implantations and subsequently diffused into the underlying polycrystalline silicon layer by rapid thermal annealing. Physical a...
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| Veröffentlicht in: | IEEE transactions on electron devices 1989-06, Vol.36 (6), p.1087-1093 |
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| container_end_page | 1093 |
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| container_issue | 6 |
| container_start_page | 1087 |
| container_title | IEEE transactions on electron devices |
| container_volume | 36 |
| creator | Nygren, S. Amm, D.T. Levy, D. Torres, J. Goltz, G. d'Ouville, T.T. Delpech, P. |
| description | Dual work function gate electrodes have been implemented in a 1- mu m CMOS process. Dopant atoms were implanted into tungsten silicide simultaneously with the source-drain implantations and subsequently diffused into the underlying polycrystalline silicon layer by rapid thermal annealing. Physical analyses showed that arsenic and boron could easily be incorporated in the polysilicon to concentrations greater than 10/sup 20/ cm/sup -3/. Capacitor and transistor measurements confirmed that n/sup +/ and p/sup +/ silicon could be obtained, with a difference of about 1 V between the respective flat-band voltages. By comparison with conventional n-type gate MOSFETs, it was verified that significantly improved subthreshold characteristics were obtained with p-type PMOS gate electrodes.< > |
| doi_str_mv | 10.1109/16.24352 |
| format | Article |
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Dopant atoms were implanted into tungsten silicide simultaneously with the source-drain implantations and subsequently diffused into the underlying polycrystalline silicon layer by rapid thermal annealing. Physical analyses showed that arsenic and boron could easily be incorporated in the polysilicon to concentrations greater than 10/sup 20/ cm/sup -3/. Capacitor and transistor measurements confirmed that n/sup +/ and p/sup +/ silicon could be obtained, with a difference of about 1 V between the respective flat-band voltages. By comparison with conventional n-type gate MOSFETs, it was verified that significantly improved subthreshold characteristics were obtained with p-type PMOS gate electrodes.< ></description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/16.24352</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Atomic layer deposition ; Boron ; CMOS process ; Electrodes ; Electronics ; Exact sciences and technology ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; MOSFETs ; Rapid thermal annealing ; Rapid thermal processing ; Semiconductor electronics. Microelectronics. Optoelectronics. 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Dopant atoms were implanted into tungsten silicide simultaneously with the source-drain implantations and subsequently diffused into the underlying polycrystalline silicon layer by rapid thermal annealing. Physical analyses showed that arsenic and boron could easily be incorporated in the polysilicon to concentrations greater than 10/sup 20/ cm/sup -3/. Capacitor and transistor measurements confirmed that n/sup +/ and p/sup +/ silicon could be obtained, with a difference of about 1 V between the respective flat-band voltages. By comparison with conventional n-type gate MOSFETs, it was verified that significantly improved subthreshold characteristics were obtained with p-type PMOS gate electrodes.< ></description><subject>Applied sciences</subject><subject>Atomic layer deposition</subject><subject>Boron</subject><subject>CMOS process</subject><subject>Electrodes</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>MOSFETs</subject><subject>Rapid thermal annealing</subject><subject>Rapid thermal processing</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicides</subject><subject>Silicon</subject><subject>Tungsten</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1989</creationdate><recordtype>article</recordtype><recordid>eNqNkD1PwzAQhi0EEuVDYmXzAmJJ8fkryQYqn1JRB2COHOeMjNIk2MnQf09KKliZTq_u0aO7l5AzYHMAll-DnnMpFN8jM1AqTXIt9T6ZMQZZkotMHJKjGD_HqKXkM3JzN5g66Tcd0sXL6pV-mB4p1mj70FYYabmhVduZpqeVd26Ivm2oC-2aRl976ys8IQfO1BFPd_OYvD_cvy2ekuXq8Xlxu0ysEKpPoLROypKnHDhIZyWrkOeZVNLmlile6qzMDJqSM6urTGmOyFMQZnxFMcbEMbmcvF1ovwaMfbH20WJdmwbbIRZcQaYhl_8BUyVAj-DVBNrQxhjQFV3waxM2BbBi22UBuvjpckQvdk4TraldMI318Y_PdSok3x55PnEeEX_Xk-MbkvR4_w</recordid><startdate>19890601</startdate><enddate>19890601</enddate><creator>Nygren, S.</creator><creator>Amm, D.T.</creator><creator>Levy, D.</creator><creator>Torres, J.</creator><creator>Goltz, G.</creator><creator>d'Ouville, T.T.</creator><creator>Delpech, P.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>H8D</scope></search><sort><creationdate>19890601</creationdate><title>Dual-type CMOS gate electrodes by dopant diffusion from silicide</title><author>Nygren, S. ; Amm, D.T. ; Levy, D. ; Torres, J. ; Goltz, G. ; d'Ouville, T.T. ; Delpech, P.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c335t-1bcf44b2721214fc40de298454c9c052b68b8aeab20c6d8562ee2713a35250003</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1989</creationdate><topic>Applied sciences</topic><topic>Atomic layer deposition</topic><topic>Boron</topic><topic>CMOS process</topic><topic>Electrodes</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>MOSFETs</topic><topic>Rapid thermal annealing</topic><topic>Rapid thermal processing</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Silicides</topic><topic>Silicon</topic><topic>Tungsten</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Nygren, S.</creatorcontrib><creatorcontrib>Amm, D.T.</creatorcontrib><creatorcontrib>Levy, D.</creatorcontrib><creatorcontrib>Torres, J.</creatorcontrib><creatorcontrib>Goltz, G.</creatorcontrib><creatorcontrib>d'Ouville, T.T.</creatorcontrib><creatorcontrib>Delpech, P.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Aerospace Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nygren, S.</au><au>Amm, D.T.</au><au>Levy, D.</au><au>Torres, J.</au><au>Goltz, G.</au><au>d'Ouville, T.T.</au><au>Delpech, P.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Dual-type CMOS gate electrodes by dopant diffusion from silicide</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>1989-06-01</date><risdate>1989</risdate><volume>36</volume><issue>6</issue><spage>1087</spage><epage>1093</epage><pages>1087-1093</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>Dual work function gate electrodes have been implemented in a 1- mu m CMOS process. Dopant atoms were implanted into tungsten silicide simultaneously with the source-drain implantations and subsequently diffused into the underlying polycrystalline silicon layer by rapid thermal annealing. Physical analyses showed that arsenic and boron could easily be incorporated in the polysilicon to concentrations greater than 10/sup 20/ cm/sup -3/. Capacitor and transistor measurements confirmed that n/sup +/ and p/sup +/ silicon could be obtained, with a difference of about 1 V between the respective flat-band voltages. By comparison with conventional n-type gate MOSFETs, it was verified that significantly improved subthreshold characteristics were obtained with p-type PMOS gate electrodes.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/16.24352</doi><tpages>7</tpages></addata></record> |
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| identifier | ISSN: 0018-9383 |
| ispartof | IEEE transactions on electron devices, 1989-06, Vol.36 (6), p.1087-1093 |
| issn | 0018-9383 1557-9646 |
| language | eng |
| recordid | cdi_proquest_miscellaneous_25175316 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Atomic layer deposition Boron CMOS process Electrodes Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) MOSFETs Rapid thermal annealing Rapid thermal processing Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicides Silicon Tungsten |
| title | Dual-type CMOS gate electrodes by dopant diffusion from silicide |
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