Accelerated Accurate Timing Yield Estimation Based on Control Variates and Importance Sampling
Extensive research has been conducted on a statistical timing analysis of digital integrated circuits in the existence of statistical parameter variations. However, the proposed methods either lack accuracy or efficiency, which avoids coming up with an industry standard tool. Despite this fact, ther...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2016-08, Vol.24 (8), p.2787-2798 |
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