Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits

The Negative Bias Temperature Instability (NBTI) phenomenon is agreed to be one of the main reliability concerns in nanoscale circuits. It increases the threshold voltage of pMOS transistors, thus, slows down signal propagation along logic paths between flip-flops. NBTI may cause intermittent faults...

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Veröffentlicht in:	Journal of electronic testing 2016-06, Vol.32 (3), p.273-289
Hauptverfasser:	Jenihhin, Maksim, Squillero, Giovanni, Copetti, Thiago Santos, Tihhomirov, Valentin, Kostin, Sergei, Gaudesi, Marco, Vargas, Fabian, Raik, Jaan, Sonza Reorda, Matteo, Bolzani Poehls, Leticia, Ubar, Raimund, Medeiros, Guilherme Cardoso
Format:	Artikel
Sprache:	eng
Schlagworte:	CAE) and Design Circuits Circuits and Systems Computer-Aided Engineering (CAD Delay Electrical Engineering Engineering Logic Nanostructure Nanotechnology Niobium base alloys Semiconductor devices Stimuli Temperature Transistors
Online-Zugang:	Volltext
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