A 0.45-to-1.2-V Fully Digital Low-Dropout Voltage Regulator With Fast-Transient Controller for Near/Subthreshold Circuits
A low quiescent current digital low-dropout (DLDO) voltage regulator with fast-transient response time is proposed for self-powered wireless sensor applications operating at near/subthreshold supply voltage. The D-LDO regulator incorporates both hill-climbing and binary search algorithms (HCBS) in t...
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Veröffentlicht in: | IEEE transactions on power electronics 2016-09, Vol.31 (9), p.6341-6350 |
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description | A low quiescent current digital low-dropout (DLDO) voltage regulator with fast-transient response time is proposed for self-powered wireless sensor applications operating at near/subthreshold supply voltage. The D-LDO regulator incorporates both hill-climbing and binary search algorithms (HCBS) in the control logic, thus leveraging on each other's strengths to minimize the output voltage's ripple and the quiescent current during the steady-state period as well as output voltage's spike and response time during the transition period. Additional features such as hysteresis mode control and freeze mode control are incorporated into the system to improve the performance of the D-LDO regulator. A dynamic comparator is proposed for the near/subthreshold supply voltage operation, which minimizes the voltage error and improves the maximum operating frequency. Fabricated in 130-nm CMOS technology, the D-LDO regulator regulates the output voltage V OUT from 350 to 1150 mV, while the input supply voltage VIN ranges from 450 to 1200 mV. At a V OUT of 450 mV, V IN of 500 mV and an operating frequency of 10 MHz, the regulator delivers 1500-μA load current with I QUIESCENT of 8.9 μA and a transient response time of 1.6 μs. The maximum current and power efficiencies reach 99.9% and 89.9%, respectively. The measured line regulation and load regulation are 1.6 and 0.6 mV/mA, respectively. |
doi_str_mv | 10.1109/TPEL.2015.2506605 |
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The D-LDO regulator incorporates both hill-climbing and binary search algorithms (HCBS) in the control logic, thus leveraging on each other's strengths to minimize the output voltage's ripple and the quiescent current during the steady-state period as well as output voltage's spike and response time during the transition period. Additional features such as hysteresis mode control and freeze mode control are incorporated into the system to improve the performance of the D-LDO regulator. A dynamic comparator is proposed for the near/subthreshold supply voltage operation, which minimizes the voltage error and improves the maximum operating frequency. Fabricated in 130-nm CMOS technology, the D-LDO regulator regulates the output voltage V OUT from 350 to 1150 mV, while the input supply voltage VIN ranges from 450 to 1200 mV. At a V OUT of 450 mV, V IN of 500 mV and an operating frequency of 10 MHz, the regulator delivers 1500-μA load current with I QUIESCENT of 8.9 μA and a transient response time of 1.6 μs. The maximum current and power efficiencies reach 99.9% and 89.9%, respectively. The measured line regulation and load regulation are 1.6 and 0.6 mV/mA, respectively.</description><identifier>ISSN: 0885-8993</identifier><identifier>EISSN: 1941-0107</identifier><identifier>DOI: 10.1109/TPEL.2015.2506605</identifier><identifier>CODEN: ITPEE8</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Algorithms ; CMOS ; Control ; Control systems ; Digital ; Dynamics ; Electric currents ; Electric potential ; fast transient ; hill-climbing ; Incremental ADC ; low-dropout voltage regulator (LDO) ; Power supply ; Regulators ; Sensors ; Successive-Approximation- Register (SAR) ADC ; Switches ; Switching circuits ; Synthesizable ; Time factors ; Transient response ; Voltage ; Voltage control ; Voltage regulators</subject><ispartof>IEEE transactions on power electronics, 2016-09, Vol.31 (9), p.6341-6350</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Sep 2016</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c326t-f5b0fc4efc38ceeab23dd5e2be8630e393b4056b761c88f8b3e57618ba0765d93</citedby><cites>FETCH-LOGICAL-c326t-f5b0fc4efc38ceeab23dd5e2be8630e393b4056b761c88f8b3e57618ba0765d93</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7349237$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7349237$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Li, Yongfu</creatorcontrib><creatorcontrib>Zhang, Xiaoyang</creatorcontrib><creatorcontrib>Zhang, Zhe</creatorcontrib><creatorcontrib>Lian, Yong</creatorcontrib><title>A 0.45-to-1.2-V Fully Digital Low-Dropout Voltage Regulator With Fast-Transient Controller for Near/Subthreshold Circuits</title><title>IEEE transactions on power electronics</title><addtitle>TPEL</addtitle><description>A low quiescent current digital low-dropout (DLDO) voltage regulator with fast-transient response time is proposed for self-powered wireless sensor applications operating at near/subthreshold supply voltage. The D-LDO regulator incorporates both hill-climbing and binary search algorithms (HCBS) in the control logic, thus leveraging on each other's strengths to minimize the output voltage's ripple and the quiescent current during the steady-state period as well as output voltage's spike and response time during the transition period. Additional features such as hysteresis mode control and freeze mode control are incorporated into the system to improve the performance of the D-LDO regulator. A dynamic comparator is proposed for the near/subthreshold supply voltage operation, which minimizes the voltage error and improves the maximum operating frequency. Fabricated in 130-nm CMOS technology, the D-LDO regulator regulates the output voltage V OUT from 350 to 1150 mV, while the input supply voltage VIN ranges from 450 to 1200 mV. At a V OUT of 450 mV, V IN of 500 mV and an operating frequency of 10 MHz, the regulator delivers 1500-μA load current with I QUIESCENT of 8.9 μA and a transient response time of 1.6 μs. The maximum current and power efficiencies reach 99.9% and 89.9%, respectively. The measured line regulation and load regulation are 1.6 and 0.6 mV/mA, respectively.</description><subject>Algorithms</subject><subject>CMOS</subject><subject>Control</subject><subject>Control systems</subject><subject>Digital</subject><subject>Dynamics</subject><subject>Electric currents</subject><subject>Electric potential</subject><subject>fast transient</subject><subject>hill-climbing</subject><subject>Incremental ADC</subject><subject>low-dropout voltage regulator (LDO)</subject><subject>Power supply</subject><subject>Regulators</subject><subject>Sensors</subject><subject>Successive-Approximation- Register (SAR) ADC</subject><subject>Switches</subject><subject>Switching circuits</subject><subject>Synthesizable</subject><subject>Time factors</subject><subject>Transient response</subject><subject>Voltage</subject><subject>Voltage control</subject><subject>Voltage regulators</subject><issn>0885-8993</issn><issn>1941-0107</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkcFqGzEURUVoIG6aDwjZCLrpRpOn0UijWQYnTgsmLY2bLoVm_MZWUEaupCH47zPGIYuu3l2ce3lwCLnkUHAOzfXq192yKIHLopSgFMgTMuNNxRlwqD-RGWgtmW4acUY-p_QMwCsJfEb2NxSKSrIcGC9K9kQXo_d7eus2LltPl-GV3cawC2OmT8Fnu0H6GzejtzlE-tflLV3YlNkq2iE5HDKdhyHH4D1G2k_IA9p4_Ti2eRsxbYNf07mL3ehy-kJOe-sTXrzfc_Jncbeaf2fLn_c_5jdL1olSZdbLFvquwr4TukO0bSnWa4lli1oJQNGItgKp2lrxTutetwLllHVroVZy3Yhz8u24u4vh34gpmxeXOvTeDhjGZLjmCoQSUk_o1__Q5zDGYfrO8FoDV7USYqL4kepiSClib3bRvdi4NxzMQYY5yDAHGeZdxtS5OnYcIn7wtaiaUtTiDcOChPA</recordid><startdate>201609</startdate><enddate>201609</enddate><creator>Li, Yongfu</creator><creator>Zhang, Xiaoyang</creator><creator>Zhang, Zhe</creator><creator>Lian, Yong</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TB</scope><scope>8FD</scope><scope>FR3</scope><scope>JQ2</scope><scope>KR7</scope><scope>L7M</scope><scope>F28</scope></search><sort><creationdate>201609</creationdate><title>A 0.45-to-1.2-V Fully Digital Low-Dropout Voltage Regulator With Fast-Transient Controller for Near/Subthreshold Circuits</title><author>Li, Yongfu ; Zhang, Xiaoyang ; Zhang, Zhe ; Lian, Yong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c326t-f5b0fc4efc38ceeab23dd5e2be8630e393b4056b761c88f8b3e57618ba0765d93</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>Algorithms</topic><topic>CMOS</topic><topic>Control</topic><topic>Control systems</topic><topic>Digital</topic><topic>Dynamics</topic><topic>Electric currents</topic><topic>Electric potential</topic><topic>fast transient</topic><topic>hill-climbing</topic><topic>Incremental ADC</topic><topic>low-dropout voltage regulator (LDO)</topic><topic>Power supply</topic><topic>Regulators</topic><topic>Sensors</topic><topic>Successive-Approximation- Register (SAR) ADC</topic><topic>Switches</topic><topic>Switching circuits</topic><topic>Synthesizable</topic><topic>Time factors</topic><topic>Transient response</topic><topic>Voltage</topic><topic>Voltage control</topic><topic>Voltage regulators</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Li, Yongfu</creatorcontrib><creatorcontrib>Zhang, Xiaoyang</creatorcontrib><creatorcontrib>Zhang, Zhe</creatorcontrib><creatorcontrib>Lian, Yong</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><jtitle>IEEE transactions on power electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Li, Yongfu</au><au>Zhang, Xiaoyang</au><au>Zhang, Zhe</au><au>Lian, Yong</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 0.45-to-1.2-V Fully Digital Low-Dropout Voltage Regulator With Fast-Transient Controller for Near/Subthreshold Circuits</atitle><jtitle>IEEE transactions on power electronics</jtitle><stitle>TPEL</stitle><date>2016-09</date><risdate>2016</risdate><volume>31</volume><issue>9</issue><spage>6341</spage><epage>6350</epage><pages>6341-6350</pages><issn>0885-8993</issn><eissn>1941-0107</eissn><coden>ITPEE8</coden><abstract>A low quiescent current digital low-dropout (DLDO) voltage regulator with fast-transient response time is proposed for self-powered wireless sensor applications operating at near/subthreshold supply voltage. The D-LDO regulator incorporates both hill-climbing and binary search algorithms (HCBS) in the control logic, thus leveraging on each other's strengths to minimize the output voltage's ripple and the quiescent current during the steady-state period as well as output voltage's spike and response time during the transition period. Additional features such as hysteresis mode control and freeze mode control are incorporated into the system to improve the performance of the D-LDO regulator. A dynamic comparator is proposed for the near/subthreshold supply voltage operation, which minimizes the voltage error and improves the maximum operating frequency. Fabricated in 130-nm CMOS technology, the D-LDO regulator regulates the output voltage V OUT from 350 to 1150 mV, while the input supply voltage VIN ranges from 450 to 1200 mV. At a V OUT of 450 mV, V IN of 500 mV and an operating frequency of 10 MHz, the regulator delivers 1500-μA load current with I QUIESCENT of 8.9 μA and a transient response time of 1.6 μs. The maximum current and power efficiencies reach 99.9% and 89.9%, respectively. The measured line regulation and load regulation are 1.6 and 0.6 mV/mA, respectively.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TPEL.2015.2506605</doi><tpages>10</tpages></addata></record> |
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subjects | Algorithms CMOS Control Control systems Digital Dynamics Electric currents Electric potential fast transient hill-climbing Incremental ADC low-dropout voltage regulator (LDO) Power supply Regulators Sensors Successive-Approximation- Register (SAR) ADC Switches Switching circuits Synthesizable Time factors Transient response Voltage Voltage control Voltage regulators |
title | A 0.45-to-1.2-V Fully Digital Low-Dropout Voltage Regulator With Fast-Transient Controller for Near/Subthreshold Circuits |
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