Fast division-free parallel structure for convolution perfectly matched layer in finite difference time domain method
Parallel acceleration of convolution perfectly matched layer （CPML） algorithm suffers from massive division operation which is widely accepted as one of the most expensive operations for the equipment such as graphic processing unit （GPU）, field programmable gate array （FPGA） etc. In pursuit of high...
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| Veröffentlicht in: | Journal of China universities of posts and telecommunications 2015-02, Vol.22 (1), p.72-76 |
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| container_title | Journal of China universities of posts and telecommunications |
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| creator | Bing, Bai Zhongqi, Niu Yi, Niu Bing, Wei Gang, Zhao |
| description | Parallel acceleration of convolution perfectly matched layer （CPML） algorithm suffers from massive division operation which is widely accepted as one of the most expensive operations for the equipment such as graphic processing unit （GPU）, field programmable gate array （FPGA） etc. In pursuit of higher efficiency and lower power consumption, this article revisited the CPML theory and proposed a new fast division-free parallel CPML structure. By optimally rearranging the CPML inner iteration process, all the division operators can be eliminated and replaced by recalculating the related field updating coefficients offline. Experiments show that the proposed division-free structure can save more than 50% arithmetic instructions and 25% execution time of the traditional parallel CPML structure without any accuracy loss. |
| doi_str_mv | 10.1016/S1005-8885(15)60627-6 |
| format | Article |
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By optimally rearranging the CPML inner iteration process, all the division operators can be eliminated and replaced by recalculating the related field updating coefficients offline. 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| subjects | Algorithms Arithmetic Convolution convolution perfectly matched layer Division division elimination Field programmable gate arrays finit difference time domain FPGA graphic processing unit Optimization parallel computing Perfectly matched layers Power consumption 卷积完全匹配层 图形处理单元 并行加速 并行结构 时域有限差分法 现场可编程门阵列 除法运算 |
| title | Fast division-free parallel structure for convolution perfectly matched layer in finite difference time domain method |
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