A trimming technique for capacitive SAR ADC as sensor interface
This work presented a trimming technique and algorithm applied in a capacitive successive approximation register(SAR) analog to digital converter(ADC) for a sensor interface, which can be integrated with the preceding sensor and the following controlling circuit. Without spending a special calibrati...
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Veröffentlicht in: | Journal of semiconductors 2015-12, Vol.36 (12), p.128-134 |
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container_title | Journal of semiconductors |
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creator | 刘珂 杜占坤 邵莉 马骁 |
description | This work presented a trimming technique and algorithm applied in a capacitive successive approximation register(SAR) analog to digital converter(ADC) for a sensor interface, which can be integrated with the preceding sensor and the following controlling circuit. Without spending a special calibration phase or adding complicated functions, this circuit keeps a 12-bit resolution by trimming the capacitor array. Its merits of low power and small area make it suitable to be embedded in a power and cost sensitive system such as a battery-supplied sensor network node. The prototype 12-bit ADC is implemented by 0.5 m 2P3M CMOS technology, with the wide supply range of 2–5 V, its power consumption is only 300 A at a sampling speed of 200 kHz. |
doi_str_mv | 10.1088/1674-4926/36/12/125004 |
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subjects | 12位ADC Algorithms Arrays Circuits CMOS工艺 Networks Sampling SAR Semiconductors Sensors Trimming 传感器接口 微调技术 微调电容器 模拟数字转换器 电路集成 |
title | A trimming technique for capacitive SAR ADC as sensor interface |
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