CMOS fully integrated reconfigurable power amplifier with efficiency enhancement for LTE applications

A fully integrated power amplifier using a power cell switching technique, implemented in 65 nm CMOS technology is presented. The main objective of the proposed architecture is to significantly improve the efficiency at high power back-off. To do so, distributed active transformers are used as the s...

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Veröffentlicht in:	Electronics letters 2015-01, Vol.51 (2), p.181-183
Hauptverfasser:	Tuffery, A, Deltimple, N, Kerhervé, E, Knopik, V, Cathelin, P
Format:	Artikel
Sprache:	eng
Schlagworte:	Architecture Bias CMOS CMOS fully integrated reconfigurable power amplifier CMOS integrated circuits combiner DC bias feed distributed active transformer efficiency enhancement Engineering Sciences frequency 2.5 GHz high power back‐off impedance convertors Long Term Evolution Low level LTE application Micro and nanotechnologies Microelectronics parallelised power cell Partitions Power amplifiers power cell switching technique size 65 nm splitter Switching Transformers Wireless communications
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