CMOS fully integrated reconfigurable power amplifier with efficiency enhancement for LTE applications
A fully integrated power amplifier using a power cell switching technique, implemented in 65 nm CMOS technology is presented. The main objective of the proposed architecture is to significantly improve the efficiency at high power back-off. To do so, distributed active transformers are used as the s...
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| Veröffentlicht in: | Electronics letters 2015-01, Vol.51 (2), p.181-183 |
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| container_end_page | 183 |
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| container_title | Electronics letters |
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| creator | Tuffery, A Deltimple, N Kerhervé, E Knopik, V Cathelin, P |
| description | A fully integrated power amplifier using a power cell switching technique, implemented in 65 nm CMOS technology is presented. The main objective of the proposed architecture is to significantly improve the efficiency at high power back-off. To do so, distributed active transformers are used as the splitter, the combiner and the DC bias feed to partition the power requirements among the parallelised power cells. An individual cell can be dynamically turned ON/OFF according to the desired output power. At 2.5 GHz, the measured maximum output power is 28.2 dBm and the power-added efficiency is improved for low level, +3.2 and +4.9% for 18 and 23.7 dBm, respectively. |
| doi_str_mv | 10.1049/el.2014.3525 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_24P</sourceid><recordid>TN_cdi_proquest_miscellaneous_1793253740</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>1793253740</sourcerecordid><originalsourceid>FETCH-LOGICAL-c4480-1e34adea9865d8606235be900c18ff4a3301cf5466f5146ae69b63aa49f905e93</originalsourceid><addsrcrecordid>eNp90EGPEyEUB3BiNLFZ9-YH4OBBE6c-BpgdjmvTdU3G7ME18UYofWwxFEaY2abfXpoa9aCeeCG__OH9CXnJYMlAqHcYli0wseSylU_IgnEJjWLs61OyAGC8kUyJ5-SyFL-pjIkOBFsQXH26-0zdHMKR-jjhQzYTbmlGm6LzD3M2m4B0TAfM1OzH4J2v08FPO4rOeesx2iPFuDPR4h7jRF3KdLhfUzNWbc3kUywvyDNnQsHLn-cF-XKzvl_dNsPdh4-r66GxQvTQMOTCbNGovpPbvoOu5XKDCsCy3jlhOAdmnRRd52RdwGCnNh03RiinQKLiF-TNOXdngh6z35t81Ml4fXs96NMdMFB18_6RVfv6bMecvs9YJr33xWIIJmKai2ZXireSXwmo9O2Z2pxKyeh-ZTPQp_I1Bn0qX5_Kr1ye-cEHPP7X6vUwtO9voG05_P6Rx0l_S3OOtat_PfHqL3Q9_JE8bh3_AU80nz8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1793253740</pqid></control><display><type>article</type><title>CMOS fully integrated reconfigurable power amplifier with efficiency enhancement for LTE applications</title><source>Wiley Online Library Open Access</source><creator>Tuffery, A ; Deltimple, N ; Kerhervé, E ; Knopik, V ; Cathelin, P</creator><creatorcontrib>Tuffery, A ; Deltimple, N ; Kerhervé, E ; Knopik, V ; Cathelin, P</creatorcontrib><description>A fully integrated power amplifier using a power cell switching technique, implemented in 65 nm CMOS technology is presented. The main objective of the proposed architecture is to significantly improve the efficiency at high power back-off. To do so, distributed active transformers are used as the splitter, the combiner and the DC bias feed to partition the power requirements among the parallelised power cells. An individual cell can be dynamically turned ON/OFF according to the desired output power. At 2.5 GHz, the measured maximum output power is 28.2 dBm and the power-added efficiency is improved for low level, +3.2 and +4.9% for 18 and 23.7 dBm, respectively.</description><identifier>ISSN: 0013-5194</identifier><identifier>ISSN: 1350-911X</identifier><identifier>EISSN: 1350-911X</identifier><identifier>DOI: 10.1049/el.2014.3525</identifier><language>eng</language><publisher>The Institution of Engineering and Technology</publisher><subject>Architecture ; Bias ; CMOS ; CMOS fully integrated reconfigurable power amplifier ; CMOS integrated circuits ; combiner ; DC bias feed ; distributed active transformer ; efficiency enhancement ; Engineering Sciences ; frequency 2.5 GHz ; high power back‐off ; impedance convertors ; Long Term Evolution ; Low level ; LTE application ; Micro and nanotechnologies ; Microelectronics ; parallelised power cell ; Partitions ; Power amplifiers ; power cell switching technique ; size 65 nm ; splitter ; Switching ; Transformers ; Wireless communications</subject><ispartof>Electronics letters, 2015-01, Vol.51 (2), p.181-183</ispartof><rights>The Institution of Engineering and Technology</rights><rights>2020 The Institution of Engineering and Technology</rights><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c4480-1e34adea9865d8606235be900c18ff4a3301cf5466f5146ae69b63aa49f905e93</citedby><cites>FETCH-LOGICAL-c4480-1e34adea9865d8606235be900c18ff4a3301cf5466f5146ae69b63aa49f905e93</cites><orcidid>0000-0001-6369-7544 ; 0000-0003-4735-0350</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1049%2Fel.2014.3525$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1049%2Fel.2014.3525$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>230,314,776,780,881,1411,11541,27901,27902,45550,45551,46027,46451</link.rule.ids><linktorsrc>$$Uhttps://onlinelibrary.wiley.com/doi/abs/10.1049%2Fel.2014.3525$$EView_record_in_Wiley-Blackwell$$FView_record_in_$$GWiley-Blackwell</linktorsrc><backlink>$$Uhttps://hal.science/hal-01094608$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Tuffery, A</creatorcontrib><creatorcontrib>Deltimple, N</creatorcontrib><creatorcontrib>Kerhervé, E</creatorcontrib><creatorcontrib>Knopik, V</creatorcontrib><creatorcontrib>Cathelin, P</creatorcontrib><title>CMOS fully integrated reconfigurable power amplifier with efficiency enhancement for LTE applications</title><title>Electronics letters</title><description>A fully integrated power amplifier using a power cell switching technique, implemented in 65 nm CMOS technology is presented. The main objective of the proposed architecture is to significantly improve the efficiency at high power back-off. To do so, distributed active transformers are used as the splitter, the combiner and the DC bias feed to partition the power requirements among the parallelised power cells. An individual cell can be dynamically turned ON/OFF according to the desired output power. At 2.5 GHz, the measured maximum output power is 28.2 dBm and the power-added efficiency is improved for low level, +3.2 and +4.9% for 18 and 23.7 dBm, respectively.</description><subject>Architecture</subject><subject>Bias</subject><subject>CMOS</subject><subject>CMOS fully integrated reconfigurable power amplifier</subject><subject>CMOS integrated circuits</subject><subject>combiner</subject><subject>DC bias feed</subject><subject>distributed active transformer</subject><subject>efficiency enhancement</subject><subject>Engineering Sciences</subject><subject>frequency 2.5 GHz</subject><subject>high power back‐off</subject><subject>impedance convertors</subject><subject>Long Term Evolution</subject><subject>Low level</subject><subject>LTE application</subject><subject>Micro and nanotechnologies</subject><subject>Microelectronics</subject><subject>parallelised power cell</subject><subject>Partitions</subject><subject>Power amplifiers</subject><subject>power cell switching technique</subject><subject>size 65 nm</subject><subject>splitter</subject><subject>Switching</subject><subject>Transformers</subject><subject>Wireless communications</subject><issn>0013-5194</issn><issn>1350-911X</issn><issn>1350-911X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNp90EGPEyEUB3BiNLFZ9-YH4OBBE6c-BpgdjmvTdU3G7ME18UYofWwxFEaY2abfXpoa9aCeeCG__OH9CXnJYMlAqHcYli0wseSylU_IgnEJjWLs61OyAGC8kUyJ5-SyFL-pjIkOBFsQXH26-0zdHMKR-jjhQzYTbmlGm6LzD3M2m4B0TAfM1OzH4J2v08FPO4rOeesx2iPFuDPR4h7jRF3KdLhfUzNWbc3kUywvyDNnQsHLn-cF-XKzvl_dNsPdh4-r66GxQvTQMOTCbNGovpPbvoOu5XKDCsCy3jlhOAdmnRRd52RdwGCnNh03RiinQKLiF-TNOXdngh6z35t81Ml4fXs96NMdMFB18_6RVfv6bMecvs9YJr33xWIIJmKai2ZXireSXwmo9O2Z2pxKyeh-ZTPQp_I1Bn0qX5_Kr1ye-cEHPP7X6vUwtO9voG05_P6Rx0l_S3OOtat_PfHqL3Q9_JE8bh3_AU80nz8</recordid><startdate>20150122</startdate><enddate>20150122</enddate><creator>Tuffery, A</creator><creator>Deltimple, N</creator><creator>Kerhervé, E</creator><creator>Knopik, V</creator><creator>Cathelin, P</creator><general>The Institution of Engineering and Technology</general><general>IET</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>F28</scope><scope>FR3</scope><scope>L7M</scope><scope>1XC</scope><orcidid>https://orcid.org/0000-0001-6369-7544</orcidid><orcidid>https://orcid.org/0000-0003-4735-0350</orcidid></search><sort><creationdate>20150122</creationdate><title>CMOS fully integrated reconfigurable power amplifier with efficiency enhancement for LTE applications</title><author>Tuffery, A ; Deltimple, N ; Kerhervé, E ; Knopik, V ; Cathelin, P</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c4480-1e34adea9865d8606235be900c18ff4a3301cf5466f5146ae69b63aa49f905e93</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Architecture</topic><topic>Bias</topic><topic>CMOS</topic><topic>CMOS fully integrated reconfigurable power amplifier</topic><topic>CMOS integrated circuits</topic><topic>combiner</topic><topic>DC bias feed</topic><topic>distributed active transformer</topic><topic>efficiency enhancement</topic><topic>Engineering Sciences</topic><topic>frequency 2.5 GHz</topic><topic>high power back‐off</topic><topic>impedance convertors</topic><topic>Long Term Evolution</topic><topic>Low level</topic><topic>LTE application</topic><topic>Micro and nanotechnologies</topic><topic>Microelectronics</topic><topic>parallelised power cell</topic><topic>Partitions</topic><topic>Power amplifiers</topic><topic>power cell switching technique</topic><topic>size 65 nm</topic><topic>splitter</topic><topic>Switching</topic><topic>Transformers</topic><topic>Wireless communications</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Tuffery, A</creatorcontrib><creatorcontrib>Deltimple, N</creatorcontrib><creatorcontrib>Kerhervé, E</creatorcontrib><creatorcontrib>Knopik, V</creatorcontrib><creatorcontrib>Cathelin, P</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Hyper Article en Ligne (HAL)</collection><jtitle>Electronics letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tuffery, A</au><au>Deltimple, N</au><au>Kerhervé, E</au><au>Knopik, V</au><au>Cathelin, P</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>CMOS fully integrated reconfigurable power amplifier with efficiency enhancement for LTE applications</atitle><jtitle>Electronics letters</jtitle><date>2015-01-22</date><risdate>2015</risdate><volume>51</volume><issue>2</issue><spage>181</spage><epage>183</epage><pages>181-183</pages><issn>0013-5194</issn><issn>1350-911X</issn><eissn>1350-911X</eissn><abstract>A fully integrated power amplifier using a power cell switching technique, implemented in 65 nm CMOS technology is presented. The main objective of the proposed architecture is to significantly improve the efficiency at high power back-off. To do so, distributed active transformers are used as the splitter, the combiner and the DC bias feed to partition the power requirements among the parallelised power cells. An individual cell can be dynamically turned ON/OFF according to the desired output power. At 2.5 GHz, the measured maximum output power is 28.2 dBm and the power-added efficiency is improved for low level, +3.2 and +4.9% for 18 and 23.7 dBm, respectively.</abstract><pub>The Institution of Engineering and Technology</pub><doi>10.1049/el.2014.3525</doi><tpages>3</tpages><orcidid>https://orcid.org/0000-0001-6369-7544</orcidid><orcidid>https://orcid.org/0000-0003-4735-0350</orcidid><oa>free_for_read</oa></addata></record> |
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| source | Wiley Online Library Open Access |
| subjects | Architecture Bias CMOS CMOS fully integrated reconfigurable power amplifier CMOS integrated circuits combiner DC bias feed distributed active transformer efficiency enhancement Engineering Sciences frequency 2.5 GHz high power back‐off impedance convertors Long Term Evolution Low level LTE application Micro and nanotechnologies Microelectronics parallelised power cell Partitions Power amplifiers power cell switching technique size 65 nm splitter Switching Transformers Wireless communications |
| title | CMOS fully integrated reconfigurable power amplifier with efficiency enhancement for LTE applications |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-09T02%3A53%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_24P&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=CMOS%20fully%20integrated%20reconfigurable%20power%20amplifier%20with%20efficiency%20enhancement%20for%20LTE%20applications&rft.jtitle=Electronics%20letters&rft.au=Tuffery,%20A&rft.date=2015-01-22&rft.volume=51&rft.issue=2&rft.spage=181&rft.epage=183&rft.pages=181-183&rft.issn=0013-5194&rft.eissn=1350-911X&rft_id=info:doi/10.1049/el.2014.3525&rft_dat=%3Cproquest_24P%3E1793253740%3C/proquest_24P%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1793253740&rft_id=info:pmid/&rfr_iscdi=true |