Fabrication of 3C-SiC MOS Capacitors Using High-Temperature Oxidation
A systematic study on the 3C-SiC/SiO2 interface has been done. 3C-SiC epilayers have been grown on a Si (001) substrate. Results obtained from room temperature conductance-voltage (G-V) and hi-low capacitance-voltage (C-V) on n-type 3C-SiC/SiO2 metal-oxide-semiconductor capacitors (MOS-Cs) have been...
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Veröffentlicht in: | Materials science forum 2015-06, Vol.821-823, p.464-467 |
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Sprache: | eng |
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Zusammenfassung: | A systematic study on the 3C-SiC/SiO2 interface has been done. 3C-SiC epilayers have been grown on a Si (001) substrate. Results obtained from room temperature conductance-voltage (G-V) and hi-low capacitance-voltage (C-V) on n-type 3C-SiC/SiO2 metal-oxide-semiconductor capacitors (MOS-Cs) have been reported using various types of oxides. The oxides used in these studies have been thermally grown at different oxidation temperatures - 1200°C, 1300°C and 1400°C. Also, the interface trap density (Dit) of as-grown MOS-C is compared with nitrided (thermally grown oxide + N2O post-oxidation annealing) oxides. Oxide grown at 1300°C followed by N2O-passivation at the same temperature gives the lowest Dit of 6x1011 cm-2eV-1 at 0.2eV from the conduction band (CB) edge. |
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ISSN: | 0255-5476 1662-9752 1662-9752 |
DOI: | 10.4028/www.scientific.net/MSF.821-823.464 |