High sensitivity measurement system for the direct-current, capacitance-voltage, and gate-drain low frequency noise characterization of field effect transistors
Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct...
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Veröffentlicht in: | Review of scientific instruments 2016-04, Vol.87 (4), p.044702-044702 |
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creator | Giusi, G. Giordano, O. Scandurra, G. Rapisarda, M. Calvi, S. Ciofi, C. |
description | Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz1/2, while DC performances are limited only by the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances. |
doi_str_mv | 10.1063/1.4945263 |
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In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz1/2, while DC performances are limited only by the source and measurement units used to bias the device under test. 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In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz1/2, while DC performances are limited only by the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances.</description><subject>Bias</subject><subject>CAPACITANCE</subject><subject>CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY</subject><subject>DIRECT CURRENT</subject><subject>ELECTRIC POTENTIAL</subject><subject>Electrical properties</subject><subject>ELECTRONS</subject><subject>FIELD EFFECT TRANSISTORS</subject><subject>FLUCTUATIONS</subject><subject>INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY</subject><subject>LF noise</subject><subject>Material properties</subject><subject>NOISE</subject><subject>Noise sensitivity</subject><subject>Scientific apparatus & instruments</subject><subject>Semiconductor devices</subject><subject>SENSITIVITY</subject><subject>STRESSES</subject><subject>Thin film transistors</subject><subject>THIN FILMS</subject><subject>TOPOLOGY</subject><subject>Transistors</subject><subject>Variation</subject><issn>0034-6748</issn><issn>1089-7623</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><recordid>eNp9kU1vFCEcxidGY9fqwS9gSLyo6VReBpg5mkatSRMveiYM_NmlmYEVmG3WT-NHlXXX9qRcOPDLw_PSNC8JviRYsPfkshs6TgV71KwI7odWCsoeNyuMWdcK2fVnzbOcb3E9nJCnzRmVhBEx4FXz69qvNyhDyL74nS97NIPOS4IZQkF5nwvMyMWEygaQ9QlMac2SUn29QEZvtfFFBwPtLk5Fr-EC6WDRWhdobdI-oCneIZfgxwLB7FGIPgMyG520KZD8T118DCg65DxMFoFz9QdUkq6GcokpP2-eOD1leHG6z5vvnz5-u7pub75-_nL14aY1nZSlJQR4P1phpGAARBDiMHWOw-CslVKOQwdM1AI0H0fRO2so68w4Mkk4lx1h583ro27MxatcY4HZmBhC9aMo5UOtTFTqzZHaplgj5aJmnw1Mkw4Ql6yI7AWnlPX4QfAevY1LCjWDooQeQMZppd4eKZNizgmc2iY_67RXBKvDuIqo07iVfXVSXMYZ7D35d80KvDsCB_t_mv2v2j_hXUwPoNpax34D0uu9QQ</recordid><startdate>20160401</startdate><enddate>20160401</enddate><creator>Giusi, G.</creator><creator>Giordano, O.</creator><creator>Scandurra, G.</creator><creator>Rapisarda, M.</creator><creator>Calvi, S.</creator><creator>Ciofi, C.</creator><general>American Institute of Physics</general><scope>NPM</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope><scope>7X8</scope><scope>OTOTI</scope></search><sort><creationdate>20160401</creationdate><title>High sensitivity measurement system for the direct-current, capacitance-voltage, and gate-drain low frequency noise characterization of field effect transistors</title><author>Giusi, G. ; Giordano, O. ; Scandurra, G. ; Rapisarda, M. ; Calvi, S. ; Ciofi, C.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c477t-11e58bd6c763ee1611f02ff5e9fdd777b94e36000a5bb68fdc234cbb371557413</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>Bias</topic><topic>CAPACITANCE</topic><topic>CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY</topic><topic>DIRECT CURRENT</topic><topic>ELECTRIC POTENTIAL</topic><topic>Electrical properties</topic><topic>ELECTRONS</topic><topic>FIELD EFFECT TRANSISTORS</topic><topic>FLUCTUATIONS</topic><topic>INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY</topic><topic>LF noise</topic><topic>Material properties</topic><topic>NOISE</topic><topic>Noise sensitivity</topic><topic>Scientific apparatus & instruments</topic><topic>Semiconductor devices</topic><topic>SENSITIVITY</topic><topic>STRESSES</topic><topic>Thin film transistors</topic><topic>THIN FILMS</topic><topic>TOPOLOGY</topic><topic>Transistors</topic><topic>Variation</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Giusi, G.</creatorcontrib><creatorcontrib>Giordano, O.</creatorcontrib><creatorcontrib>Scandurra, G.</creatorcontrib><creatorcontrib>Rapisarda, M.</creatorcontrib><creatorcontrib>Calvi, S.</creatorcontrib><creatorcontrib>Ciofi, C.</creatorcontrib><collection>PubMed</collection><collection>CrossRef</collection><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>MEDLINE - Academic</collection><collection>OSTI.GOV</collection><jtitle>Review of scientific instruments</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Giusi, G.</au><au>Giordano, O.</au><au>Scandurra, G.</au><au>Rapisarda, M.</au><au>Calvi, S.</au><au>Ciofi, C.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>High sensitivity measurement system for the direct-current, capacitance-voltage, and gate-drain low frequency noise characterization of field effect transistors</atitle><jtitle>Review of scientific instruments</jtitle><addtitle>Rev Sci Instrum</addtitle><date>2016-04-01</date><risdate>2016</risdate><volume>87</volume><issue>4</issue><spage>044702</spage><epage>044702</epage><pages>044702-044702</pages><issn>0034-6748</issn><eissn>1089-7623</eissn><coden>RSINAK</coden><abstract>Measurements of current fluctuations originating in electron devices have been largely used to understand the electrical properties of materials and ultimate device performances. In this work, we propose a high-sensitivity measurement setup topology suitable for the automatic and programmable Direct-Current (DC), Capacitance-Voltage (CV), and gate-drain low frequency noise characterization of field effect transistors at wafer level. Automatic and programmable operation is particularly useful when the device characteristics relax or degrade with time due to optical, bias, or temperature stress. The noise sensitivity of the proposed topology is in the order of fA/Hz1/2, while DC performances are limited only by the source and measurement units used to bias the device under test. DC, CV, and NOISE measurements, down to 1 pA of DC gate and drain bias currents, in organic thin film transistors are reported to demonstrate system operation and performances.</abstract><cop>United States</cop><pub>American Institute of Physics</pub><pmid>27131690</pmid><doi>10.1063/1.4945263</doi><tpages>6</tpages></addata></record> |
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subjects | Bias CAPACITANCE CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY DIRECT CURRENT ELECTRIC POTENTIAL Electrical properties ELECTRONS FIELD EFFECT TRANSISTORS FLUCTUATIONS INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY LF noise Material properties NOISE Noise sensitivity Scientific apparatus & instruments Semiconductor devices SENSITIVITY STRESSES Thin film transistors THIN FILMS TOPOLOGY Transistors Variation |
title | High sensitivity measurement system for the direct-current, capacitance-voltage, and gate-drain low frequency noise characterization of field effect transistors |
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