Insight Into a Generic Interconnect Resource Model for Xilinx Virtex and Spartan Series FPGAs

With increasing scale of field-programmable gate arrays (FPGAs), the architecture of interconnect resources (IRs) in FPGAs is becoming more and more complicated. FPGAs become more vulnerable to defects during manufacturing or lifetime operation. IR testing plays an important role to guarantee correc...

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Veröffentlicht in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2013-11, Vol.60 (11), p.801-805
Hauptverfasser: Ruan, A, Yang, J, Wan, L, Jie, B, Tian, Z
Format: Artikel
Sprache:eng
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