Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process
A multi-deposition multi-annealing technique （MDMA） is introduced into the process of high-k/metal gate MOSFET for the gate last process to effectively reduce the gate leakage and improve the device＇s performance. In this paper, we systematically investigate the electrical parameters and the time-de...
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| Veröffentlicht in: | Chinese physics B 2015-11, Vol.24 (11), p.464-467 |
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| creator | 王艳蓉 杨红 徐昊 王晓磊 罗维春 祁路伟 张淑祥 王文武 闫江 朱慧珑 赵超 陈大鹏 叶甜春 |
| description | A multi-deposition multi-annealing technique （MDMA） is introduced into the process of high-k/metal gate MOSFET for the gate last process to effectively reduce the gate leakage and improve the device＇s performance. In this paper, we systematically investigate the electrical parameters and the time-dependent dielectric breakdown （TDDB） characteristics of positive channel metal oxide semiconductor （PMOS） under different MDMA process conditions, including the depo- sition/annealing （D＆A） cycles, the D＆A time, and the total annealing time. The results show that the increases of the number of D＆A cycles （from 1 to 2） and D＆A time （from 15 s to 30 s） can contribute to the results that the gate leakage current decreases by about one order of magnitude and that the time to fail （TTF） at 63.2% increases by about several times. However, too many D＆A cycles （such as 4 cycles） make the equivalent oxide thickness （EOT） increase by about 1A and the TTF of PMOS worsen. Moreover, different D＆A times and numbers of D＆A cycles induce different breakdown mechanisms. |
| doi_str_mv | 10.1088/1674-1056/24/ll/117306 |
| format | Article |
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In this paper, we systematically investigate the electrical parameters and the time-dependent dielectric breakdown （TDDB） characteristics of positive channel metal oxide semiconductor （PMOS） under different MDMA process conditions, including the depo- sition/annealing （D＆A） cycles, the D＆A time, and the total annealing time. The results show that the increases of the number of D＆A cycles （from 1 to 2） and D＆A time （from 15 s to 30 s） can contribute to the results that the gate leakage current decreases by about one order of magnitude and that the time to fail （TTF） at 63.2% increases by about several times. However, too many D＆A cycles （such as 4 cycles） make the equivalent oxide thickness （EOT） increase by about 1A and the TTF of PMOS worsen. Moreover, different D＆A times and numbers of D＆A cycles induce different breakdown mechanisms.</description><identifier>ISSN: 1674-1056</identifier><identifier>EISSN: 2058-3834</identifier><identifier>EISSN: 1741-4199</identifier><identifier>DOI: 10.1088/1674-1056/24/ll/117306</identifier><language>eng</language><subject>Annealing ; Deposition ; Dielectric breakdown ; Equivalence ; Gates ; Leakage current ; MOSFET ; MOSFETs ; Oxides ; PMOS ; 时间依赖性 ; 沉积 ; 电击穿特性 ; 等效氧化层厚度 ; 退火技术 ; 金属栅</subject><ispartof>Chinese physics B, 2015-11, Vol.24 (11), p.464-467</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Uhttp://image.cqvip.com/vip1000/qk/85823A/85823A.jpg</thumbnail><link.rule.ids>314,778,782,27911,27912</link.rule.ids></links><search><creatorcontrib>王艳蓉 杨红 徐昊 王晓磊 罗维春 祁路伟 张淑祥 王文武 闫江 朱慧珑 赵超 陈大鹏 叶甜春</creatorcontrib><title>Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process</title><title>Chinese physics B</title><addtitle>Chinese Physics</addtitle><description>A multi-deposition multi-annealing technique （MDMA） is introduced into the process of high-k/metal gate MOSFET for the gate last process to effectively reduce the gate leakage and improve the device＇s performance. In this paper, we systematically investigate the electrical parameters and the time-dependent dielectric breakdown （TDDB） characteristics of positive channel metal oxide semiconductor （PMOS） under different MDMA process conditions, including the depo- sition/annealing （D＆A） cycles, the D＆A time, and the total annealing time. The results show that the increases of the number of D＆A cycles （from 1 to 2） and D＆A time （from 15 s to 30 s） can contribute to the results that the gate leakage current decreases by about one order of magnitude and that the time to fail （TTF） at 63.2% increases by about several times. However, too many D＆A cycles （such as 4 cycles） make the equivalent oxide thickness （EOT） increase by about 1A and the TTF of PMOS worsen. Moreover, different D＆A times and numbers of D＆A cycles induce different breakdown mechanisms.</description><subject>Annealing</subject><subject>Deposition</subject><subject>Dielectric breakdown</subject><subject>Equivalence</subject><subject>Gates</subject><subject>Leakage current</subject><subject>MOSFET</subject><subject>MOSFETs</subject><subject>Oxides</subject><subject>PMOS</subject><subject>时间依赖性</subject><subject>沉积</subject><subject>电击穿特性</subject><subject>等效氧化层厚度</subject><subject>退火技术</subject><subject>金属栅</subject><issn>1674-1056</issn><issn>2058-3834</issn><issn>1741-4199</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNo9kF1LwzAYhYMoOKd_QYJX3tTmq2l2KcOPwWSCuy9p-maNS9OtyRj-C3-yGxteHTg8PAcOQveUPFGiVE5lKTJKCpkzkXufU1pyIi_QiJFCZVxxcYlG_9A1uonxmxBJCeMj9DsL1u8gGMC9xd3OJ5c1sOmjS64P50KHANq7sMKHKrkOjgiEBkLCjQMPJg3O4HoAvW76fcCm1YM2CQYXkzPxqP78WHzhvUstbt2qzdZ5B0l7vNIJsNcx4c3QG4jxFl1Z7SPcnXOMlq8vy-l7Nl-8zabP88xIojJWl9wywWUNNbe0ZlaQQhjW2JoUk0ljlbATBoXihKrSypKAkLWyZNKUgpGaj9HjSXuY3e4gpqpz0YD3OkC_ixUtlaSSEakO6MMJNW0fVtvDDdVmcJ0efioppSiplAX_Awr0d4I</recordid><startdate>20151101</startdate><enddate>20151101</enddate><creator>王艳蓉 杨红 徐昊 王晓磊 罗维春 祁路伟 张淑祥 王文武 闫江 朱慧珑 赵超 陈大鹏 叶甜春</creator><scope>2RA</scope><scope>92L</scope><scope>CQIGP</scope><scope>~WA</scope><scope>7U5</scope><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope></search><sort><creationdate>20151101</creationdate><title>Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process</title><author>王艳蓉 杨红 徐昊 王晓磊 罗维春 祁路伟 张淑祥 王文武 闫江 朱慧珑 赵超 陈大鹏 叶甜春</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c608-2b73f2436beb3f1b2f4054c2dfb0599df84f92e5830187f670e46b8f09d7420b3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Annealing</topic><topic>Deposition</topic><topic>Dielectric breakdown</topic><topic>Equivalence</topic><topic>Gates</topic><topic>Leakage current</topic><topic>MOSFET</topic><topic>MOSFETs</topic><topic>Oxides</topic><topic>PMOS</topic><topic>时间依赖性</topic><topic>沉积</topic><topic>电击穿特性</topic><topic>等效氧化层厚度</topic><topic>退火技术</topic><topic>金属栅</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>王艳蓉 杨红 徐昊 王晓磊 罗维春 祁路伟 张淑祥 王文武 闫江 朱慧珑 赵超 陈大鹏 叶甜春</creatorcontrib><collection>中文科技期刊数据库</collection><collection>中文科技期刊数据库-CALIS站点</collection><collection>中文科技期刊数据库-7.0平台</collection><collection>中文科技期刊数据库- 镜像站点</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Chinese physics B</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>王艳蓉 杨红 徐昊 王晓磊 罗维春 祁路伟 张淑祥 王文武 闫江 朱慧珑 赵超 陈大鹏 叶甜春</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process</atitle><jtitle>Chinese physics B</jtitle><addtitle>Chinese Physics</addtitle><date>2015-11-01</date><risdate>2015</risdate><volume>24</volume><issue>11</issue><spage>464</spage><epage>467</epage><pages>464-467</pages><issn>1674-1056</issn><eissn>2058-3834</eissn><eissn>1741-4199</eissn><abstract>A multi-deposition multi-annealing technique （MDMA） is introduced into the process of high-k/metal gate MOSFET for the gate last process to effectively reduce the gate leakage and improve the device＇s performance. In this paper, we systematically investigate the electrical parameters and the time-dependent dielectric breakdown （TDDB） characteristics of positive channel metal oxide semiconductor （PMOS） under different MDMA process conditions, including the depo- sition/annealing （D＆A） cycles, the D＆A time, and the total annealing time. The results show that the increases of the number of D＆A cycles （from 1 to 2） and D＆A time （from 15 s to 30 s） can contribute to the results that the gate leakage current decreases by about one order of magnitude and that the time to fail （TTF） at 63.2% increases by about several times. However, too many D＆A cycles （such as 4 cycles） make the equivalent oxide thickness （EOT） increase by about 1A and the TTF of PMOS worsen. Moreover, different D＆A times and numbers of D＆A cycles induce different breakdown mechanisms.</abstract><doi>10.1088/1674-1056/24/ll/117306</doi><tpages>4</tpages></addata></record> |
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| ispartof | Chinese physics B, 2015-11, Vol.24 (11), p.464-467 |
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| subjects | Annealing Deposition Dielectric breakdown Equivalence Gates Leakage current MOSFET MOSFETs Oxides PMOS 时间依赖性 沉积 电击穿特性 等效氧化层厚度 退火技术 金属栅 |
| title | Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process |
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