Buri: Scaling Big-Memory Computing with Hardware-Based Memory Expansion

Motivated by the challenges of scaling up memory capacity and fully exploiting the benefits of memory compression, we propose Buri, a hardware-based memory compression scheme, which simultaneously achieves cost efficiency, high performance, and ease of adoption. Buri combines (1) a self-contained, r...

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Veröffentlicht in:	ACM transactions on architecture and code optimization 2015-10, Vol.12 (3), p.1-24
Hauptverfasser:	Zhao, Jishen, Li, Sheng, Chang, Jichuan, Byrne, John L, Ramirez, Laura L, Lim, Kevin, Xie, Yuan, Faraboschi, Paolo
Format:	Artikel
Sprache:	eng
Schlagworte:	Architecture Compressing Computer programs Hardware Optimization Scaling up Weight reduction
Online-Zugang:	Volltext
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