Hybrid memory-efficient multimatch packet classification for NIDS
Network applications such as network intrusion detection systems (NIDSs) require multimatch packet classification, where all matched results need to be reported. Most researchers have adopted a TCAM-based architecture to enhance system performance, but TCAM consumes high amounts of power and require...
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Veröffentlicht in: | Microprocessors and microsystems 2015-03, Vol.39 (2), p.113-121 |
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description | Network applications such as network intrusion detection systems (NIDSs) require multimatch packet classification, where all matched results need to be reported. Most researchers have adopted a TCAM-based architecture to enhance system performance, but TCAM consumes high amounts of power and requires a lot of memory resources. In this paper, we analyze the characteristics of the Snort rule set, and propose an memory-efficient multimatch packet classification architecture for NIDS using the result of analysis. The proposed hybrid architecture uses hash-based matching for searching single port numbers and k-ary tree matching for searching range port numbers and is synthesized on Altera Stratix IV FPGA. Compared with previous TCAM-based architectures, our design achieves over four times improvement in memory requirement and power consumption. Our architecture sustains 16.8–67.4Gbps throughput for minimum size (40bytes) packets. |
doi_str_mv | 10.1016/j.micpro.2015.02.001 |
format | Article |
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Our architecture sustains 16.8–67.4Gbps throughput for minimum size (40bytes) packets.</description><subject>Architecture</subject><subject>Classification</subject><subject>FPGA</subject><subject>Intrusion</subject><subject>Matching</subject><subject>Multimatch classification</subject><subject>Networks</subject><subject>NIDS</subject><subject>Packet classification</subject><subject>Ports</subject><subject>Power consumption</subject><subject>Range search</subject><subject>Searching</subject><issn>0141-9331</issn><issn>1872-9436</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNp9kD9PwzAUxC0EEqXwDRgysiQ824kTL0hV-VepggGYLcd5Fi5JU2wXqd8eV2FmesO7O939CLmmUFCg4nZTDM7s_FgwoFUBrACgJ2RGm5rlsuTilMyAljSXnNNzchHCBgAqEGxGFs-H1rsuG3AY_SFHa51xuI3ZsO-jG3Q0n9lOmy-Mmel1CC79dXTjNrOjz15W92-X5MzqPuDV352Tj8eH9-Vzvn59Wi0X69xwLmPecd4KKytkteWSGosVEyhLQWWrbSpcInSmkbICWTei1VRgY1qJpQBbc8Hn5GbKTUO_9xiiGlww2Pd6i-M-KFrXwOqKyipJy0lq_BiCR6t2Pm3xB0VBHYmpjZqIqSMxBUylAsl2N9kwzfhx6FU4sjDYOY8mqm50_wf8AnmadfA</recordid><startdate>20150301</startdate><enddate>20150301</enddate><creator>Lee, KyuHee</creator><creator>Yun, SangKyun</creator><general>Elsevier B.V</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>F28</scope><scope>FR3</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>20150301</creationdate><title>Hybrid memory-efficient multimatch packet classification for NIDS</title><author>Lee, KyuHee ; Yun, SangKyun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c339t-d33b6f95e27f391cfe526e94619baf0014e0dc899509786ba16e8cb9e460f7363</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Architecture</topic><topic>Classification</topic><topic>FPGA</topic><topic>Intrusion</topic><topic>Matching</topic><topic>Multimatch classification</topic><topic>Networks</topic><topic>NIDS</topic><topic>Packet classification</topic><topic>Ports</topic><topic>Power consumption</topic><topic>Range search</topic><topic>Searching</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lee, KyuHee</creatorcontrib><creatorcontrib>Yun, SangKyun</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>Microprocessors and microsystems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Lee, KyuHee</au><au>Yun, SangKyun</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Hybrid memory-efficient multimatch packet classification for NIDS</atitle><jtitle>Microprocessors and microsystems</jtitle><date>2015-03-01</date><risdate>2015</risdate><volume>39</volume><issue>2</issue><spage>113</spage><epage>121</epage><pages>113-121</pages><issn>0141-9331</issn><eissn>1872-9436</eissn><abstract>Network applications such as network intrusion detection systems (NIDSs) require multimatch packet classification, where all matched results need to be reported. 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subjects | Architecture Classification FPGA Intrusion Matching Multimatch classification Networks NIDS Packet classification Ports Power consumption Range search Searching |
title | Hybrid memory-efficient multimatch packet classification for NIDS |
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