BTB Energy Reduction by Focusing on Useless Accesses
Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a...
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Veröffentlicht in: | IEICE Transactions on Electronics 2015/07/01, Vol.E98.C(7), pp.569-579 |
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creator | SHIMOMURA, Yoshio YAMAMOTO, Hiroki USUI, Hayato KOBAYASHI, Ryotaro SHIMADA, Hajime |
description | Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss. |
doi_str_mv | 10.1587/transele.E98.C.569 |
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Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. 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Electron.</addtitle><description>Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss.</description><subject>branch prediction</subject><subject>Branch Target Buffer</subject><subject>Buffers</subject><subject>Energy consumption</subject><subject>energy reduction</subject><subject>Processors</subject><subject>Reduction</subject><subject>Wastes</subject><issn>0916-8524</issn><issn>1745-1353</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNpdkD1rwzAURUVpoWnaP9DJYxe7epYlS2NikqYQKJRkFrIspw6OnerZQ_59FdIP6HS5cM4dLiGPQBPgMn8evOnQtS5ZKJkUCRfqikwgz3gMjLNrMqEKRCx5mt2SO8Q9pSBTYBOSzTfzaNE5vztF764a7dD0XVSeomVvR2y6XRTq9jyNGM2sDeHwntzUpkX38J1Tsl0uNsUqXr-9vBazdWwzwYaYUVqVXFnOLdS8YinnwgAXdQllWgEDUUspTVZSqlymhKhSKAOQG8pCBzYlT5fdo-8_R4eDPjRoXduazvUjashBqiznVAU0vaDW94je1from4PxJw1Uny_SPxfpcJEudLgoSKuLtMfB7NyvYvzQ2ED-U_I_9RexH8Zr17EvGOZ1CQ</recordid><startdate>2015</startdate><enddate>2015</enddate><creator>SHIMOMURA, Yoshio</creator><creator>YAMAMOTO, Hiroki</creator><creator>USUI, Hayato</creator><creator>KOBAYASHI, Ryotaro</creator><creator>SHIMADA, Hajime</creator><general>The Institute of Electronics, Information and Communication Engineers</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>2015</creationdate><title>BTB Energy Reduction by Focusing on Useless Accesses</title><author>SHIMOMURA, Yoshio ; YAMAMOTO, Hiroki ; USUI, Hayato ; KOBAYASHI, Ryotaro ; SHIMADA, Hajime</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c463t-300db59c55c1f5d32556a156fb1b2d1316f888a4b009e4966d21ba157a03e4913</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>branch prediction</topic><topic>Branch Target Buffer</topic><topic>Buffers</topic><topic>Energy consumption</topic><topic>energy reduction</topic><topic>Processors</topic><topic>Reduction</topic><topic>Wastes</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>SHIMOMURA, Yoshio</creatorcontrib><creatorcontrib>YAMAMOTO, Hiroki</creatorcontrib><creatorcontrib>USUI, Hayato</creatorcontrib><creatorcontrib>KOBAYASHI, Ryotaro</creatorcontrib><creatorcontrib>SHIMADA, Hajime</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEICE Transactions on Electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>SHIMOMURA, Yoshio</au><au>YAMAMOTO, Hiroki</au><au>USUI, Hayato</au><au>KOBAYASHI, Ryotaro</au><au>SHIMADA, Hajime</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>BTB Energy Reduction by Focusing on Useless Accesses</atitle><jtitle>IEICE Transactions on Electronics</jtitle><addtitle>IEICE Trans. Electron.</addtitle><date>2015</date><risdate>2015</risdate><volume>E98.C</volume><issue>7</issue><spage>569</spage><epage>579</epage><pages>569-579</pages><issn>0916-8524</issn><eissn>1745-1353</eissn><abstract>Modern processors use Branch Target Buffer (BTB)[1] to relax control dependence. Unfortunately, the energy consumption of the BTB is high. In order to effectively fetch instructions, it is necessary to perform a branch prediction at the fetch stage, regardless of whether the fetched instruction is a branch or a nonbranch. Therefore, the number of accesses to the BTB is large, and the energy consumption of the BTB is high. However, accesses from nonbranches to the BTB waste energy. In this paper, we focus on accesses from nonbranches to the BTB, which we call useless accesses from a viewpoint of power. For reducing energy consumption without performance loss, we present a method that reduces useless accesses by using information that indicates whether a fetched instruction is a branch or not. To realize the above approach, we propose a branch bit called B-Bit. A B-Bit is associated with an instruction and indicates whether it is a branch or not. A B-Bit is available at the beginning of the fetch stage. If a B-Bit is “1” signifying a branch, the BTB is accessed. If a B-Bit is “0” signifying a nonbranch, the BTB is not accessed. The experimental results show that the total energy consumption can be reduced by 54.3% without performance loss.</abstract><pub>The Institute of Electronics, Information and Communication Engineers</pub><doi>10.1587/transele.E98.C.569</doi><tpages>11</tpages></addata></record> |
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subjects | branch prediction Branch Target Buffer Buffers Energy consumption energy reduction Processors Reduction Wastes |
title | BTB Energy Reduction by Focusing on Useless Accesses |
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