SET-Tolerant Active Body-Bias Circuits in PD-SOI CMOS Technology

PD-SOI (Partial Depleted Silicon On Insulator) process is a good candidate technology for space system designs, since it features excellent insulation to the silicon substrate compared to the conventional bulk CMOS process. However, the radioactive particles from the low earth orbit can causes singl...

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Veröffentlicht in:	IEICE Transactions on Electronics 2015/07/01, Vol.E98.C(7), pp.729-733
Hauptverfasser:	JANG, YoungKyu, CHANG, Ik-Joon, KIM, Jinsang
Format:	Artikel
Sprache:	eng
Schlagworte:	active body bias Circuits CMOS history effect Insulation Insulators Palladium PD-SOI SET Side effects Silicon substrates Systems design
Online-Zugang:	Volltext
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