Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator
This brief presents a dynamic slew enhancement technique for improving the transient response in an adaptively biased low-dropout regulator. This is done by introducing FAST and SLOW paths in an adaptive bias loop. The FAST path injects a quick momentary current during a low-to-high load transient,...
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| Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2015-07, Vol.62 (7), p.626-630 |
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| container_title | IEEE transactions on circuits and systems. II, Express briefs |
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| creator | Maity, Ashis Patra, Amit |
| description | This brief presents a dynamic slew enhancement technique for improving the transient response in an adaptively biased low-dropout regulator. This is done by introducing FAST and SLOW paths in an adaptive bias loop. The FAST path injects a quick momentary current during a low-to-high load transient, whereas the SLOW path keeps the current large during a high-to-low load step. The dynamic current shoots up to quite a high level as it is combined with adaptive biasing. When the proposed technique is implemented in the 0.18-μm CMOS technology, the experimental results show the effective reduction in the undershoot (67%) and the overshoot (66.7%) while maintaining a low quiescent current of 1.1 μA. The settling times during 0-50-mA and 50-0-mA load transients are improved by 74% and 99.9%, respectively. |
| doi_str_mv | 10.1109/TCSII.2015.2415311 |
| format | Article |
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This is done by introducing FAST and SLOW paths in an adaptive bias loop. The FAST path injects a quick momentary current during a low-to-high load transient, whereas the SLOW path keeps the current large during a high-to-low load step. The dynamic current shoots up to quite a high level as it is combined with adaptive biasing. When the proposed technique is implemented in the 0.18-μm CMOS technology, the experimental results show the effective reduction in the undershoot (67%) and the overshoot (66.7%) while maintaining a low quiescent current of 1.1 μA. The settling times during 0-50-mA and 50-0-mA load transients are improved by 74% and 99.9%, respectively.</description><identifier>ISSN: 1549-7747</identifier><identifier>EISSN: 1558-3791</identifier><identifier>DOI: 10.1109/TCSII.2015.2415311</identifier><identifier>CODEN: ICSPE5</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Bandwidth ; Circuits ; CMOS ; current mirror ; Dynamical systems ; Dynamics ; Finite element analysis ; gain enhancement ; Level (quantity) ; Logic gates ; Low drop-out regulator ; low quiescent current ; Materials ; Regulators ; Resistance ; Settling ; transconductance amplifier (OTA) ; Transient analysis ; Transient response ; Transient responses</subject><ispartof>IEEE transactions on circuits and systems. II, Express briefs, 2015-07, Vol.62 (7), p.626-630</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Jul 2015</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c328t-c318b044c297dd254eb8dd89f4950ce8c3e9f591909a0be3ba1553bfe32983ca3</citedby><cites>FETCH-LOGICAL-c328t-c318b044c297dd254eb8dd89f4950ce8c3e9f591909a0be3ba1553bfe32983ca3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7064764$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7064764$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Maity, Ashis</creatorcontrib><creatorcontrib>Patra, Amit</creatorcontrib><title>Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator</title><title>IEEE transactions on circuits and systems. II, Express briefs</title><addtitle>TCSII</addtitle><description>This brief presents a dynamic slew enhancement technique for improving the transient response in an adaptively biased low-dropout regulator. This is done by introducing FAST and SLOW paths in an adaptive bias loop. The FAST path injects a quick momentary current during a low-to-high load transient, whereas the SLOW path keeps the current large during a high-to-low load step. The dynamic current shoots up to quite a high level as it is combined with adaptive biasing. When the proposed technique is implemented in the 0.18-μm CMOS technology, the experimental results show the effective reduction in the undershoot (67%) and the overshoot (66.7%) while maintaining a low quiescent current of 1.1 μA. The settling times during 0-50-mA and 50-0-mA load transients are improved by 74% and 99.9%, respectively.</description><subject>Bandwidth</subject><subject>Circuits</subject><subject>CMOS</subject><subject>current mirror</subject><subject>Dynamical systems</subject><subject>Dynamics</subject><subject>Finite element analysis</subject><subject>gain enhancement</subject><subject>Level (quantity)</subject><subject>Logic gates</subject><subject>Low drop-out regulator</subject><subject>low quiescent current</subject><subject>Materials</subject><subject>Regulators</subject><subject>Resistance</subject><subject>Settling</subject><subject>transconductance amplifier (OTA)</subject><subject>Transient analysis</subject><subject>Transient response</subject><subject>Transient responses</subject><issn>1549-7747</issn><issn>1558-3791</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkU9v1DAQxS0EUsvSL1AulrhwyeK_a_tYti2stBIS3Z4tx5m0rhI7tZNW--1J2IoDl5k5_N5o3jyELilZU0rMt8P2brdbM0LlmgkqOaXv0DmVUldcGfp-mYWplBLqDH0s5YkQZghn5-j5-hhdHzy-6-AV38RHFz30EEd8AP8Yw_MEuE0Z7_ohp5cQH_Ahu1jCQvyGMqRYAIeIXcRXjRvG8ALdEX8PrkCD9-m1us5pSNMCP0ydG1P-hD60ritw8dZX6P725rD9We1__dhtr_aV50yPc6W6JkJ4ZlTTMCmg1k2jTSuMJB6052BaaaghxpEaeO1mu7xugTOjuXd8hb6e9s6Hzy7KaPtQPHSdi5CmYqmi2jBKtJzRL_-hT2nKcb7O0o1hjEs1f2uF2InyOZWSobVDDr3LR0uJXVKwf1OwSwr2LYVZ9PkkCgDwT6DIRqiN4H8A2LaEUw</recordid><startdate>201507</startdate><enddate>201507</enddate><creator>Maity, Ashis</creator><creator>Patra, Amit</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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II, Express briefs</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Maity, Ashis</au><au>Patra, Amit</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator</atitle><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle><stitle>TCSII</stitle><date>2015-07</date><risdate>2015</risdate><volume>62</volume><issue>7</issue><spage>626</spage><epage>630</epage><pages>626-630</pages><issn>1549-7747</issn><eissn>1558-3791</eissn><coden>ICSPE5</coden><abstract>This brief presents a dynamic slew enhancement technique for improving the transient response in an adaptively biased low-dropout regulator. This is done by introducing FAST and SLOW paths in an adaptive bias loop. The FAST path injects a quick momentary current during a low-to-high load transient, whereas the SLOW path keeps the current large during a high-to-low load step. The dynamic current shoots up to quite a high level as it is combined with adaptive biasing. When the proposed technique is implemented in the 0.18-μm CMOS technology, the experimental results show the effective reduction in the undershoot (67%) and the overshoot (66.7%) while maintaining a low quiescent current of 1.1 μA. The settling times during 0-50-mA and 50-0-mA load transients are improved by 74% and 99.9%, respectively.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSII.2015.2415311</doi><tpages>5</tpages></addata></record> |
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| ispartof | IEEE transactions on circuits and systems. II, Express briefs, 2015-07, Vol.62 (7), p.626-630 |
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| subjects | Bandwidth Circuits CMOS current mirror Dynamical systems Dynamics Finite element analysis gain enhancement Level (quantity) Logic gates Low drop-out regulator low quiescent current Materials Regulators Resistance Settling transconductance amplifier (OTA) Transient analysis Transient response Transient responses |
| title | Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator |
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