Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring

The degraded thermal path of 3-D integrated circuits (3DICs) makes thermal analysis at the chip-scale an essential part of the design process. Performing an appropriate thermal analysis on such circuits requires a model with junction-level fidelity; however, the computational burden imposed by such...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems 2012-05, Vol.31 (5), p.676-689
Hauptverfasser:	Melamed, S., Thorolfsson, T., Harris, T. R., Priyadarshi, S., Franzon, P., Steer, M. B., Davis, W. R.
Format:	Artikel
Sprache:	eng
Schlagworte:	3-D integrated circuits (3DICs) Blurring Circuits Conductivity Design engineering Heating High definition High definition video Integrated circuit modeling Integrated circuits Mathematical model measurement Power Blurring method silicon-on-insulator (SOI) simulation Studies Thermal analysis Thermal conductivity Thermal simulation Three dimensional through-silicon vias (TSVs) Transistors
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