IC thermal simulation and modeling via efficient multigrid-based approaches
The ever-increasing power consumption and packaging density of integrated systems creates on-chip temperatures and gradients that can have a substantial impact on performance and reliability. While it is conceptually understood that a thermal equivalent circuit can be constructed to characterize the...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 2006-09, Vol.25 (9), p.1763-1776 |
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container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
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creator | Peng Li Pileggi, L.T. Asheghi, M. Chandra, R. |
description | The ever-increasing power consumption and packaging density of integrated systems creates on-chip temperatures and gradients that can have a substantial impact on performance and reliability. While it is conceptually understood that a thermal equivalent circuit can be constructed to characterize the temperature gradients across the chip, direct and iterative solutions of the corresponding three-dimensional (3-D) equations are often intractable for a full-chip analysis. Integrated circuit (IC)-specific multigrid (MG) techniques for fast chip level thermal steady-state and transient simulation are proposed. This approach avoids an explicit construction of the matrix problem that is intractable for most full-chip problems. Specific MG treatments are proposed to cope with the strong anisotropy of the full-chip thermal problem that is created by the vast difference in material thermal properties and chip geometries. Importantly, this paper demonstrates that only with careful thermal modeling assumptions and appropriate choices for grid hierarchy, MG operators, and smoothing steps across grid points can a full-chip thermal problem be accurately and efficiently analyzed. This paper further speeds up the large thermal transient simulations by incorporating reduced-order thermal models that can be efficiently extracted under the same MG framework. The experiments carried out in this work have shown that the proposed methodology provides sufficient efficiency in both runtime and memory usage |
doi_str_mv | 10.1109/TCAD.2005.858276 |
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fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_miscellaneous_1671292557</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1673750</ieee_id><sourcerecordid>1671292557</sourcerecordid><originalsourceid>FETCH-LOGICAL-c323t-263e6d94a77b247ef01450166088ac30aab5316af164b6c3e9ef2e91b798134d3</originalsourceid><addsrcrecordid>eNpdkEtLxDAUhYMoOD72gpviyk3Hm6RJmuVQX4MDbsZ1SNvbmQx9jEkr-O9tqSC4upvvnHv4CLmhsKQU9MM2Wz0uGYBYpiJlSp6QBdVcxQkV9JQsgKk0BlBwTi5COADQRDC9IG_rLOr36BtbR8E1Q21717WRbcuo6UqsXbuLvpyNsKpc4bDto5Hp3c67Ms5twDKyx6PvbLHHcEXOKlsHvP69l-Tj-Wmbvcab95d1ttrEBWe8j5nkKEudWKVyliispi1ApYQ0tQUHa3PBqbQVlUkuC44aK4aa5kqnlCclvyT3c-_4-HPA0JvGhQLr2rbYDcFQqSjTTAg1onf_0EM3-HZcZ1IppIAEkhGCGSp8F4LHyhy9a6z_NhTMJNdMcs0k18xyx8jtHHGI-IdLxZUA_gM2ynRA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>865650404</pqid></control><display><type>article</type><title>IC thermal simulation and modeling via efficient multigrid-based approaches</title><source>IEEE Electronic Library (IEL)</source><creator>Peng Li ; Pileggi, L.T. ; Asheghi, M. ; Chandra, R.</creator><creatorcontrib>Peng Li ; Pileggi, L.T. ; Asheghi, M. ; Chandra, R.</creatorcontrib><description>The ever-increasing power consumption and packaging density of integrated systems creates on-chip temperatures and gradients that can have a substantial impact on performance and reliability. While it is conceptually understood that a thermal equivalent circuit can be constructed to characterize the temperature gradients across the chip, direct and iterative solutions of the corresponding three-dimensional (3-D) equations are often intractable for a full-chip analysis. Integrated circuit (IC)-specific multigrid (MG) techniques for fast chip level thermal steady-state and transient simulation are proposed. This approach avoids an explicit construction of the matrix problem that is intractable for most full-chip problems. Specific MG treatments are proposed to cope with the strong anisotropy of the full-chip thermal problem that is created by the vast difference in material thermal properties and chip geometries. Importantly, this paper demonstrates that only with careful thermal modeling assumptions and appropriate choices for grid hierarchy, MG operators, and smoothing steps across grid points can a full-chip thermal problem be accurately and efficiently analyzed. This paper further speeds up the large thermal transient simulations by incorporating reduced-order thermal models that can be efficiently extracted under the same MG framework. The experiments carried out in this work have shown that the proposed methodology provides sufficient efficiency in both runtime and memory usage</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/TCAD.2005.858276</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Chips ; Computer simulation ; Construction ; Density ; Energy consumption ; Equations ; Equivalent circuits ; Integrated circuit modeling ; Integrated circuit reliability ; Integrated circuit thermal factor ; Integrated circuits ; Mathematical models ; Packaging ; Power system modeling ; Power system reliability ; simulation ; Studies ; System-on-a-chip ; Temperature ; temperature control ; Thermal properties ; Thermal simulation</subject><ispartof>IEEE transactions on computer-aided design of integrated circuits and systems, 2006-09, Vol.25 (9), p.1763-1776</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2006</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c323t-263e6d94a77b247ef01450166088ac30aab5316af164b6c3e9ef2e91b798134d3</citedby><cites>FETCH-LOGICAL-c323t-263e6d94a77b247ef01450166088ac30aab5316af164b6c3e9ef2e91b798134d3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1673750$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27905,27906,54739</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1673750$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Peng Li</creatorcontrib><creatorcontrib>Pileggi, L.T.</creatorcontrib><creatorcontrib>Asheghi, M.</creatorcontrib><creatorcontrib>Chandra, R.</creatorcontrib><title>IC thermal simulation and modeling via efficient multigrid-based approaches</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>The ever-increasing power consumption and packaging density of integrated systems creates on-chip temperatures and gradients that can have a substantial impact on performance and reliability. While it is conceptually understood that a thermal equivalent circuit can be constructed to characterize the temperature gradients across the chip, direct and iterative solutions of the corresponding three-dimensional (3-D) equations are often intractable for a full-chip analysis. Integrated circuit (IC)-specific multigrid (MG) techniques for fast chip level thermal steady-state and transient simulation are proposed. This approach avoids an explicit construction of the matrix problem that is intractable for most full-chip problems. Specific MG treatments are proposed to cope with the strong anisotropy of the full-chip thermal problem that is created by the vast difference in material thermal properties and chip geometries. Importantly, this paper demonstrates that only with careful thermal modeling assumptions and appropriate choices for grid hierarchy, MG operators, and smoothing steps across grid points can a full-chip thermal problem be accurately and efficiently analyzed. This paper further speeds up the large thermal transient simulations by incorporating reduced-order thermal models that can be efficiently extracted under the same MG framework. The experiments carried out in this work have shown that the proposed methodology provides sufficient efficiency in both runtime and memory usage</description><subject>Chips</subject><subject>Computer simulation</subject><subject>Construction</subject><subject>Density</subject><subject>Energy consumption</subject><subject>Equations</subject><subject>Equivalent circuits</subject><subject>Integrated circuit modeling</subject><subject>Integrated circuit reliability</subject><subject>Integrated circuit thermal factor</subject><subject>Integrated circuits</subject><subject>Mathematical models</subject><subject>Packaging</subject><subject>Power system modeling</subject><subject>Power system reliability</subject><subject>simulation</subject><subject>Studies</subject><subject>System-on-a-chip</subject><subject>Temperature</subject><subject>temperature control</subject><subject>Thermal properties</subject><subject>Thermal simulation</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2006</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkEtLxDAUhYMoOD72gpviyk3Hm6RJmuVQX4MDbsZ1SNvbmQx9jEkr-O9tqSC4upvvnHv4CLmhsKQU9MM2Wz0uGYBYpiJlSp6QBdVcxQkV9JQsgKk0BlBwTi5COADQRDC9IG_rLOr36BtbR8E1Q21717WRbcuo6UqsXbuLvpyNsKpc4bDto5Hp3c67Ms5twDKyx6PvbLHHcEXOKlsHvP69l-Tj-Wmbvcab95d1ttrEBWe8j5nkKEudWKVyliispi1ApYQ0tQUHa3PBqbQVlUkuC44aK4aa5kqnlCclvyT3c-_4-HPA0JvGhQLr2rbYDcFQqSjTTAg1onf_0EM3-HZcZ1IppIAEkhGCGSp8F4LHyhy9a6z_NhTMJNdMcs0k18xyx8jtHHGI-IdLxZUA_gM2ynRA</recordid><startdate>20060901</startdate><enddate>20060901</enddate><creator>Peng Li</creator><creator>Pileggi, L.T.</creator><creator>Asheghi, M.</creator><creator>Chandra, R.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20060901</creationdate><title>IC thermal simulation and modeling via efficient multigrid-based approaches</title><author>Peng Li ; Pileggi, L.T. ; Asheghi, M. ; Chandra, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c323t-263e6d94a77b247ef01450166088ac30aab5316af164b6c3e9ef2e91b798134d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Chips</topic><topic>Computer simulation</topic><topic>Construction</topic><topic>Density</topic><topic>Energy consumption</topic><topic>Equations</topic><topic>Equivalent circuits</topic><topic>Integrated circuit modeling</topic><topic>Integrated circuit reliability</topic><topic>Integrated circuit thermal factor</topic><topic>Integrated circuits</topic><topic>Mathematical models</topic><topic>Packaging</topic><topic>Power system modeling</topic><topic>Power system reliability</topic><topic>simulation</topic><topic>Studies</topic><topic>System-on-a-chip</topic><topic>Temperature</topic><topic>temperature control</topic><topic>Thermal properties</topic><topic>Thermal simulation</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Peng Li</creatorcontrib><creatorcontrib>Pileggi, L.T.</creatorcontrib><creatorcontrib>Asheghi, M.</creatorcontrib><creatorcontrib>Chandra, R.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Peng Li</au><au>Pileggi, L.T.</au><au>Asheghi, M.</au><au>Chandra, R.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>IC thermal simulation and modeling via efficient multigrid-based approaches</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>2006-09-01</date><risdate>2006</risdate><volume>25</volume><issue>9</issue><spage>1763</spage><epage>1776</epage><pages>1763-1776</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract>The ever-increasing power consumption and packaging density of integrated systems creates on-chip temperatures and gradients that can have a substantial impact on performance and reliability. While it is conceptually understood that a thermal equivalent circuit can be constructed to characterize the temperature gradients across the chip, direct and iterative solutions of the corresponding three-dimensional (3-D) equations are often intractable for a full-chip analysis. Integrated circuit (IC)-specific multigrid (MG) techniques for fast chip level thermal steady-state and transient simulation are proposed. This approach avoids an explicit construction of the matrix problem that is intractable for most full-chip problems. Specific MG treatments are proposed to cope with the strong anisotropy of the full-chip thermal problem that is created by the vast difference in material thermal properties and chip geometries. Importantly, this paper demonstrates that only with careful thermal modeling assumptions and appropriate choices for grid hierarchy, MG operators, and smoothing steps across grid points can a full-chip thermal problem be accurately and efficiently analyzed. This paper further speeds up the large thermal transient simulations by incorporating reduced-order thermal models that can be efficiently extracted under the same MG framework. The experiments carried out in this work have shown that the proposed methodology provides sufficient efficiency in both runtime and memory usage</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCAD.2005.858276</doi><tpages>14</tpages></addata></record> |
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identifier | ISSN: 0278-0070 |
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source | IEEE Electronic Library (IEL) |
subjects | Chips Computer simulation Construction Density Energy consumption Equations Equivalent circuits Integrated circuit modeling Integrated circuit reliability Integrated circuit thermal factor Integrated circuits Mathematical models Packaging Power system modeling Power system reliability simulation Studies System-on-a-chip Temperature temperature control Thermal properties Thermal simulation |
title | IC thermal simulation and modeling via efficient multigrid-based approaches |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-19T01%3A01%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=IC%20thermal%20simulation%20and%20modeling%20via%20efficient%20multigrid-based%20approaches&rft.jtitle=IEEE%20transactions%20on%20computer-aided%20design%20of%20integrated%20circuits%20and%20systems&rft.au=Peng%20Li&rft.date=2006-09-01&rft.volume=25&rft.issue=9&rft.spage=1763&rft.epage=1776&rft.pages=1763-1776&rft.issn=0278-0070&rft.eissn=1937-4151&rft.coden=ITCSDI&rft_id=info:doi/10.1109/TCAD.2005.858276&rft_dat=%3Cproquest_RIE%3E1671292557%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=865650404&rft_id=info:pmid/&rft_ieee_id=1673750&rfr_iscdi=true |