Suitability of metal gate stacks for low-power and high-performance applications: impact of carrier confinement
A simulation study is carried out to assess the competitiveness of metal gate stacks for low-power and high-performance technologies using realistic oxynitride and high-permittivity gate dielectric stacks having insulator leakages appropriate for each application. In the first part of this paper, th...
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description | A simulation study is carried out to assess the competitiveness of metal gate stacks for low-power and high-performance technologies using realistic oxynitride and high-permittivity gate dielectric stacks having insulator leakages appropriate for each application. In the first part of this paper, the metal-gate work function is fixed at a value near midgap. For this value of work function, the performance (obtained from mixed-mode simulations of inverter delay chains) of metal gate stacks is found to exceed that of polysilicon gate stacks for low-power applications, but to be uncompetitive for high-performance applications. Both of these observations are explained by understanding the role of carrier confinement determined by the channel doping required for each application. In the second part of this paper, the metal-gate work function is allowed to vary in order to obtain the optimal work-function ranges for each application. Metal gate stacks are shown to be especially suitable for low-power applications over a wide range of possible work functions, with optimal performance away from the band edges. For high-performance applications, work functions near the band edges yield the best performance, but significant gains compared to polysilicon-gated devices are found only when additional scaling is achieved through a use of a high-permittivity gate insulator. |
doi_str_mv | 10.1109/TED.2006.872883 |
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In the first part of this paper, the metal-gate work function is fixed at a value near midgap. For this value of work function, the performance (obtained from mixed-mode simulations of inverter delay chains) of metal gate stacks is found to exceed that of polysilicon gate stacks for low-power applications, but to be uncompetitive for high-performance applications. Both of these observations are explained by understanding the role of carrier confinement determined by the channel doping required for each application. In the second part of this paper, the metal-gate work function is allowed to vary in order to obtain the optimal work-function ranges for each application. Metal gate stacks are shown to be especially suitable for low-power applications over a wide range of possible work functions, with optimal performance away from the band edges. For high-performance applications, work functions near the band edges yield the best performance, but significant gains compared to polysilicon-gated devices are found only when additional scaling is achieved through a use of a high-permittivity gate insulator.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2006.872883</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Charge carrier lifetime ; Compound structure devices ; Confinement ; Devices ; Dielectric materials ; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics ; Electronics ; Exact sciences and technology ; Gates ; Insulators ; MOS devices ; Optimization ; Permittivity ; semiconductor device modeling ; Semiconductor electronics. Microelectronics. Optoelectronics. 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In the first part of this paper, the metal-gate work function is fixed at a value near midgap. For this value of work function, the performance (obtained from mixed-mode simulations of inverter delay chains) of metal gate stacks is found to exceed that of polysilicon gate stacks for low-power applications, but to be uncompetitive for high-performance applications. Both of these observations are explained by understanding the role of carrier confinement determined by the channel doping required for each application. In the second part of this paper, the metal-gate work function is allowed to vary in order to obtain the optimal work-function ranges for each application. Metal gate stacks are shown to be especially suitable for low-power applications over a wide range of possible work functions, with optimal performance away from the band edges. For high-performance applications, work functions near the band edges yield the best performance, but significant gains compared to polysilicon-gated devices are found only when additional scaling is achieved through a use of a high-permittivity gate insulator.</description><subject>Applied sciences</subject><subject>Charge carrier lifetime</subject><subject>Compound structure devices</subject><subject>Confinement</subject><subject>Devices</subject><subject>Dielectric materials</subject><subject>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Gates</subject><subject>Insulators</subject><subject>MOS devices</subject><subject>Optimization</subject><subject>Permittivity</subject><subject>semiconductor device modeling</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Simulation</subject><subject>Stacks</subject><subject>work function</subject><subject>Work functions</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2006</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9kU2LFDEQhoMoOI6ePXgJguKlZ_PVSdqbrOsHLHhwPYeadGU3a3enTTIs--_NMAsLHjwVoZ73gcpLyGvOdpyz4ezq4vNOMKZ31ghr5ROy4X1vukEr_ZRsGOO2G6SVz8mLUm7bUyslNiT9PMQK-zjFek9ToDNWmOg1VKSlgv9daEiZTumuW9MdZgrLSG_i9U23Ym6bGRaPFNZ1ih5qTEv5SOO8gq9HmYecYwv5tIS44IxLfUmeBZgKvnqYW_Lry8XV-bfu8sfX7-efLjuvlK2d30vJeyN4ABwZgh4HGUYbhhAGgVJ4Lb233GAACAL2nI0sgA_KWuxbVG7J-5N3zenPAUt1cywepwkWTIfihGV6YFo38MN_Qa4NF0aLZt2St_-gt-mQl3aGs7rnWhslGnR2gnxOpWQMbs1xhnzvOHPHolwryh2LcqeiWuLdgxaKhynk9qexPMaMUYOQR_ObExcR8XGthTJMyb8rK51x</recordid><startdate>20060501</startdate><enddate>20060501</enddate><creator>Kumar, A.</creator><creator>Solomon, P.M.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20060501</creationdate><title>Suitability of metal gate stacks for low-power and high-performance applications: impact of carrier confinement</title><author>Kumar, A. ; Solomon, P.M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c448t-cb3315721faed0ea6d93fd8f9ff92e32c63cc817efaaf2ab10d0facf488e53313</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Applied sciences</topic><topic>Charge carrier lifetime</topic><topic>Compound structure devices</topic><topic>Confinement</topic><topic>Devices</topic><topic>Dielectric materials</topic><topic>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Gates</topic><topic>Insulators</topic><topic>MOS devices</topic><topic>Optimization</topic><topic>Permittivity</topic><topic>semiconductor device modeling</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Simulation</topic><topic>Stacks</topic><topic>work function</topic><topic>Work functions</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kumar, A.</creatorcontrib><creatorcontrib>Solomon, P.M.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kumar, A.</au><au>Solomon, P.M.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Suitability of metal gate stacks for low-power and high-performance applications: impact of carrier confinement</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2006-05-01</date><risdate>2006</risdate><volume>53</volume><issue>5</issue><spage>1208</spage><epage>1215</epage><pages>1208-1215</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>A simulation study is carried out to assess the competitiveness of metal gate stacks for low-power and high-performance technologies using realistic oxynitride and high-permittivity gate dielectric stacks having insulator leakages appropriate for each application. In the first part of this paper, the metal-gate work function is fixed at a value near midgap. For this value of work function, the performance (obtained from mixed-mode simulations of inverter delay chains) of metal gate stacks is found to exceed that of polysilicon gate stacks for low-power applications, but to be uncompetitive for high-performance applications. Both of these observations are explained by understanding the role of carrier confinement determined by the channel doping required for each application. In the second part of this paper, the metal-gate work function is allowed to vary in order to obtain the optimal work-function ranges for each application. Metal gate stacks are shown to be especially suitable for low-power applications over a wide range of possible work functions, with optimal performance away from the band edges. For high-performance applications, work functions near the band edges yield the best performance, but significant gains compared to polysilicon-gated devices are found only when additional scaling is achieved through a use of a high-permittivity gate insulator.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2006.872883</doi><tpages>8</tpages></addata></record> |
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subjects | Applied sciences Charge carrier lifetime Compound structure devices Confinement Devices Dielectric materials Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology Gates Insulators MOS devices Optimization Permittivity semiconductor device modeling Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Simulation Stacks work function Work functions |
title | Suitability of metal gate stacks for low-power and high-performance applications: impact of carrier confinement |
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