Wafer-Level Packaging With Soldered Stress-Engineered Micro-Springs

Micro-springs for integrated circuit test and packaging are demonstrated as soldered flip chip interconnects in a direct die to printed circuit board package. The spring interconnects are fabricated with thin film metallization as the last step in a wafer-scale process. The z-compliance of the inter...

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Veröffentlicht in:	IEEE transactions on advanced packaging 2009-05, Vol.32 (2), p.372-378
Hauptverfasser:	Chow, E.M., Fork, D.K., Chua, C.L., Van Schuylenbergh, K., Hantschel, T.
Format:	Artikel
Sprache:	eng
Schlagworte:	Automotive components Cantilever Chips Circuit boards Circuit testing compliant interconnects fine pitch Flip chip Integrated circuit interconnections Integrated circuit packaging Integrated circuit testing memory packaging Metallization micro-spring Packaging Printed circuit boards Printed circuits probing Soldering Solders Springs stress-engineered surface mount technology Thin film circuits wafer level packaging Wafer scale integration Wafers
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