Experimental characterization of statistically independent defects in gate dielectrics-part I: description and validation of the model

A general statistical model to describe the generation of statistically independent defects in gate dielectrics is presented. In this first paper, the general model, suitable for different types of defects, is developed to describe the stress-induced oxide traps and the statistical properties of the...

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Veröffentlicht in:	IEEE transactions on electron devices 2005-05, Vol.52 (5), p.942-948
Hauptverfasser:	Driussi, F., Widdershoven, F., Esseni, D., Selmi, L., van Duuren, M.J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Arrays Computer simulation Defects Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Flash memory (computers) Gates Integrated circuits Integrated circuits by function (including memories and processors) Leakage currents Magnetic and optical mass memories Mathematical models Monte Carlo methods Oxides Probability density distribution (PDD) Semiconductor device modeling Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Statistical analysis statistical model Storage and reproduction of information stress-induced leakage current (SILC) stress-induced oxide traps Studies trap-assisted tunneling (TAT) Tunneling
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