GROK-LAB: Generating Real On-chip Knowledge for Intra-cluster Delays Using Timing Extraction

Timing Extraction identifies the delay of fine-grained components within an FPGA. From these computed delays, the delay of any path can be calculated. Moreover, a comparison of the fine-grained delays allows a detailed understanding of the amount and type of process variation that exists in the FPGA...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	ACM transactions on reconfigurable technology and systems 2015-01, Vol.7 (4), p.1-23
Hauptverfasser:	Gojman, Benjamin, Nalmela, Sirisha, Mehta, Nikil, Howarth, Nicholas, Dehon, André
Format:	Artikel
Sprache:	eng
Schlagworte:	Arrays Blocking Cyclones Delay Extraction Field programmable gate arrays Mathematical analysis Spreads Time measurements
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!