Scan Tree Design for 3-D ICs with Constraint of Leaf Nodes Number

To reduce the test time and test cost of 3-D ICs, this paper proposed a design method of building three-dimensional scan tree, which can optimize the number of through silicon via (TSV) when limit the leaf nodes number. The proposed technique partitioned compatible groups in every layer based on tes...

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Veröffentlicht in:	Applied Mechanics and Materials 2014-12, Vol.701-702 (Industrial Engineering, Computation and Information Technologies), p.231-235
Hauptverfasser:	Hu, Jing Yun, Liu, Jun, Yi, Mao Xiang
Format:	Artikel
Sprache:	eng
Schlagworte:	Buildings Compatibility Construction Construction costs Integer programming Mathematical analysis Three dimensional Trees
Online-Zugang:	Volltext
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