All digital folded low-area, low-power maximum power point tracking chip for photovoltaic energy conversion system
ABSTRACT In this paper, we propose and implement a 12‐bit area‐efficient folded all‐digital maximum power point tracking (MPPT) chip based on gain‐adaptive perturb‐and‐observe algorithm for photovoltaic energy conversion system. Alternative to DSP or micro controller, realizing the MPPT algorithm by...
Gespeichert in:
Veröffentlicht in: | International journal of circuit theory and applications 2014-09, Vol.42 (9), p.939-955 |
---|---|
Hauptverfasser: | , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | ABSTRACT
In this paper, we propose and implement a 12‐bit area‐efficient folded all‐digital maximum power point tracking (MPPT) chip based on gain‐adaptive perturb‐and‐observe algorithm for photovoltaic energy conversion system. Alternative to DSP or micro controller, realizing the MPPT algorithm by using ASIC can achieve higher energy conversion efficiency, lower power consumption and smaller chip area. By using gain‐adaptive perturb‐and‐observe MPPT algorithm, overall system power consumption can be reduced by overcoming the periodic perturbation issues that occur in conventional perturb‐and‐observe MPPT algorithm. The utilization of proportional integral controller allows fast and stable tracking of the maximum power point. Under high intensity sun illumination, the gain‐adaptive perturb‐and‐observe algorithm performs three times faster than the conventional perturb‐and‐observe MPPT algorithm. Under low intensity sun illumination, the gain‐adaptive perturb‐and‐observe algorithm can provide the same power conversion efficiency as the conventional perturb‐and‐observe MPPT algorithm. By using folding VLSI architecture, the MPPT algorithm can be realized with 74% chip area saving and 77% power consumption reduction. Finally, our proposed MPPT chip is implemented in TSMC0.18‐µm process, with 0.85 mm*0.79 mm chip area and 97.9% power conversion efficiency. Copyright © 2013 John Wiley & Sons, Ltd.
In this paper, we propose and implement a 12‐bit area‐efficient folded all‐digital maximum power point tracking (MPPT) chip based on gain‐adaptive perturb‐and‐observe algorithm for photovoltaic energy conversion system. By using folding VLSI architecture, the MPPT algorithm can be realized with 74% chip area saving and 77% power consumption reduction. Finally, our proposed MPPT chip is implemented in TSMC0.18‐µm process, with 0.85 mm*0.79 mm chip area and 97.9% power conversion efficiency. |
---|---|
ISSN: | 0098-9886 1097-007X |
DOI: | 10.1002/cta.1894 |