High-Throughput Turbo Decoder With Parallel Architecture for LTE Wireless Communication Standards

This work focuses on the VLSI design aspect of high- speed maximum a posteriori (MAP) probability decoders which are intrinsic building-blocks of parallel turbo decoders. For the logarithmic-Bahl-Cocke-Jelinek-Raviv (LBCJR) algorithm used in MAP decoders, we have presented an ungrouped backward recu...

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Veröffentlicht in:	IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2014-09, Vol.61 (9), p.2699-2710
Hauptverfasser:	Shrestha, Rahul, Paily, Roy P.
Format:	Artikel
Sprache:	eng
Schlagworte:	3GPP-LTE/LTE-advanced Architecture Bahl-Cocke-Jelinek-Raviv (BCJR) algorithm Computer architecture Construction Critical path Decoders Decoding Delays Design engineering Integrated circuits maximum a posteriori (MAP) decoder parallel turbo decoding and VLSI design Throughput turbo codes Very large scale integration VLSI Wireless communication wireless communications
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