Novel BCD Process Platform with Integrated Self-Extracted JTE Trench Technology for EL Drivers ICs

A low cost silicon BCD technology in place of high cost SOI BCD technology for monolithic integrated EL driver ICs application is put forward. Several key technologies are presented. An advanced SEJTET termination technology was designed instead of the conventional PIOS isolation to obtain smaller chip area and protect HVICs from the occurrence of di/dt effect under PWM operation. Novel VDMOS/Resurf LDPMOS devices were developed compatibly to obtain the lowest R on , sp , improve silicon utilization, and simplify key process steps.