A four channel time-to-digital converter ASIC with in-built calibration and SPI interface

A design of high resolution, wide dynamic range Time-to-Digital Converter (TDC) ASIC, implemented in 0.35µm commercial CMOS technology is presented. The ASIC features four channel TDC with an in-built calibration and Serial Peripheral Interconnect (SPI) slave interface. The TDC is based on the verni...

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Veröffentlicht in:	Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment Accelerators, spectrometers, detectors and associated equipment, 2014-02, Vol.737, p.117-121
Hauptverfasser:	Hari Prasad, K., Sukhwani, Menka, Saxena, Pooja, Chandratre, V.B., Pithawa, C.K.
Format:	Artikel
Sprache:	eng
Schlagworte:	Accelerators Aplication specific integrated circuit (ASIC) Calibration Channels Converters Dynamic range High resolution Nonlinearity Oscillators PVT SPI Time-to-digital conversion (TDC) Vernier method
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