A simulation framework for modeling charge transport and degradation in high-k stacks
In this paper we present a comprehensive physical model that describes charge transport and degradation phenomena in high-k stacks. The physical mechanisms are modeled using a novel material-related approach that includes in a self-consistent fashion the charge transport (dominated by defect-assiste...
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Veröffentlicht in: | Journal of computational electronics 2013-12, Vol.12 (4), p.658-665 |
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description | In this paper we present a comprehensive physical model that describes charge transport and degradation phenomena in high-k stacks. The physical mechanisms are modeled using a novel material-related approach that includes in a self-consistent fashion the charge transport (dominated by defect-assisted contribution), power dissipation and temperature increase, defect generation, and ion and vacancy diffusion and recombination. The physical properties of defects, which play a crucial role in determining the electrical behavior of the high-k stacks, depend on their atomistic configurations, as calculated using ab-initio methods. This simulation framework represents a powerful tool to interpret electrical characterization measurements. In addition, it can be used to optimize logic and memory device stacks thanks to its predictive statistical capabilities that allow reproducing gate current, threshold voltage increase and time to breakdown (TDDB) statistics. Simulation results performed using this simulation package are shown to reproduce accurately leakage current, Stress-Induced Leakage Current (SILC), threshold voltage shift observed during Positive Bias Temperature Instability (PBTI) stress, TDDB in various dielectric stacks. |
doi_str_mv | 10.1007/s10825-013-0526-z |
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The physical mechanisms are modeled using a novel material-related approach that includes in a self-consistent fashion the charge transport (dominated by defect-assisted contribution), power dissipation and temperature increase, defect generation, and ion and vacancy diffusion and recombination. The physical properties of defects, which play a crucial role in determining the electrical behavior of the high-k stacks, depend on their atomistic configurations, as calculated using ab-initio methods. This simulation framework represents a powerful tool to interpret electrical characterization measurements. In addition, it can be used to optimize logic and memory device stacks thanks to its predictive statistical capabilities that allow reproducing gate current, threshold voltage increase and time to breakdown (TDDB) statistics. Simulation results performed using this simulation package are shown to reproduce accurately leakage current, Stress-Induced Leakage Current (SILC), threshold voltage shift observed during Positive Bias Temperature Instability (PBTI) stress, TDDB in various dielectric stacks.</description><identifier>ISSN: 1569-8025</identifier><identifier>EISSN: 1572-8137</identifier><identifier>DOI: 10.1007/s10825-013-0526-z</identifier><language>eng</language><publisher>Boston: Springer US</publisher><subject>Charge transport ; Defects ; Degradation ; Electrical Engineering ; Electrical properties ; Energy ; Energy dissipation ; Engineering ; Grain boundaries ; Heat ; Leakage current ; Mathematical and Computational Engineering ; Mathematical and Computational Physics ; Mechanical Engineering ; Memory devices ; Optical and Electronic Materials ; Physical properties ; Simulation ; Software packages ; Stacks ; Temperature ; Theoretical ; Threshold voltage ; Transport phenomena</subject><ispartof>Journal of computational electronics, 2013-12, Vol.12 (4), p.658-665</ispartof><rights>Springer Science+Business Media New York 2013</rights><rights>Springer Science+Business Media New York 2013.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c349t-6229e2aab6b404a8930f870651f403ba98602d55e013cb97f19986b702a010253</citedby><cites>FETCH-LOGICAL-c349t-6229e2aab6b404a8930f870651f403ba98602d55e013cb97f19986b702a010253</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/s10825-013-0526-z$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://www.proquest.com/docview/2918267005?pq-origsite=primo$$EHTML$$P50$$Gproquest$$H</linktohtml><link.rule.ids>314,780,784,21388,27924,27925,33744,33745,41488,42557,43805,51319,64385,64387,64389,72469</link.rule.ids></links><search><creatorcontrib>Larcher, Luca</creatorcontrib><creatorcontrib>Padovani, Andrea</creatorcontrib><creatorcontrib>Vandelli, Luca</creatorcontrib><title>A simulation framework for modeling charge transport and degradation in high-k stacks</title><title>Journal of computational electronics</title><addtitle>J Comput Electron</addtitle><description>In this paper we present a comprehensive physical model that describes charge transport and degradation phenomena in high-k stacks. The physical mechanisms are modeled using a novel material-related approach that includes in a self-consistent fashion the charge transport (dominated by defect-assisted contribution), power dissipation and temperature increase, defect generation, and ion and vacancy diffusion and recombination. The physical properties of defects, which play a crucial role in determining the electrical behavior of the high-k stacks, depend on their atomistic configurations, as calculated using ab-initio methods. This simulation framework represents a powerful tool to interpret electrical characterization measurements. In addition, it can be used to optimize logic and memory device stacks thanks to its predictive statistical capabilities that allow reproducing gate current, threshold voltage increase and time to breakdown (TDDB) statistics. Simulation results performed using this simulation package are shown to reproduce accurately leakage current, Stress-Induced Leakage Current (SILC), threshold voltage shift observed during Positive Bias Temperature Instability (PBTI) stress, TDDB in various dielectric stacks.</description><subject>Charge transport</subject><subject>Defects</subject><subject>Degradation</subject><subject>Electrical Engineering</subject><subject>Electrical properties</subject><subject>Energy</subject><subject>Energy dissipation</subject><subject>Engineering</subject><subject>Grain boundaries</subject><subject>Heat</subject><subject>Leakage current</subject><subject>Mathematical and Computational Engineering</subject><subject>Mathematical and Computational Physics</subject><subject>Mechanical Engineering</subject><subject>Memory devices</subject><subject>Optical and Electronic Materials</subject><subject>Physical properties</subject><subject>Simulation</subject><subject>Software packages</subject><subject>Stacks</subject><subject>Temperature</subject><subject>Theoretical</subject><subject>Threshold voltage</subject><subject>Transport phenomena</subject><issn>1569-8025</issn><issn>1572-8137</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>AFKRA</sourceid><sourceid>AZQEC</sourceid><sourceid>BENPR</sourceid><sourceid>CCPQU</sourceid><sourceid>DWQXO</sourceid><sourceid>GNUQQ</sourceid><recordid>eNp1kEtLxDAUhYMoOD5-gLuAGzfRm7R5LYfBFwy4cdYhbdNOZ9pmTFrE-fW2VBAEV_dy-c7hnoPQDYV7CiAfIgXFOAGaEOBMkOMJWlAuGVE0kafTLjRRwPg5uohxB8CApXSBNksc63ZobF_7DpfBtu7Thz0ufcCtL1xTdxXOtzZUDvfBdvHgQ49tV-DCVcEWs67u8LautmSPY2_zfbxCZ6Vtorv-mZdo8_T4vnoh67fn19VyTfIk1T0RjGnHrM1ElkJqlU6gVBIEp2UKSWa1EsAKzt0YK8-0LKkeT5kEZoGOWZJLdDf7HoL_GFzsTVvH3DWN7ZwfoqEcRCK1TtWI3v5Bd34I3fidYZoqJiTAZEhnKg8-xuBKcwh1a8OXoWCmos1ctBk_MlPR5jhq2KyJI9tVLvw6_y_6Bux8f2w</recordid><startdate>20131201</startdate><enddate>20131201</enddate><creator>Larcher, Luca</creator><creator>Padovani, Andrea</creator><creator>Vandelli, Luca</creator><general>Springer US</general><general>Springer Nature B.V</general><scope>AAYXX</scope><scope>CITATION</scope><scope>8FE</scope><scope>8FG</scope><scope>ABJCF</scope><scope>AFKRA</scope><scope>ARAPS</scope><scope>AZQEC</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>DWQXO</scope><scope>GNUQQ</scope><scope>HCIFZ</scope><scope>JQ2</scope><scope>K7-</scope><scope>L6V</scope><scope>M7S</scope><scope>P5Z</scope><scope>P62</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>PTHSS</scope><scope>7SC</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>FR3</scope><scope>KR7</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>20131201</creationdate><title>A simulation framework for modeling charge transport and degradation in high-k stacks</title><author>Larcher, Luca ; Padovani, Andrea ; Vandelli, Luca</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c349t-6229e2aab6b404a8930f870651f403ba98602d55e013cb97f19986b702a010253</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Charge transport</topic><topic>Defects</topic><topic>Degradation</topic><topic>Electrical Engineering</topic><topic>Electrical properties</topic><topic>Energy</topic><topic>Energy dissipation</topic><topic>Engineering</topic><topic>Grain boundaries</topic><topic>Heat</topic><topic>Leakage current</topic><topic>Mathematical and Computational Engineering</topic><topic>Mathematical and Computational Physics</topic><topic>Mechanical Engineering</topic><topic>Memory devices</topic><topic>Optical and Electronic Materials</topic><topic>Physical properties</topic><topic>Simulation</topic><topic>Software packages</topic><topic>Stacks</topic><topic>Temperature</topic><topic>Theoretical</topic><topic>Threshold voltage</topic><topic>Transport phenomena</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Larcher, Luca</creatorcontrib><creatorcontrib>Padovani, Andrea</creatorcontrib><creatorcontrib>Vandelli, Luca</creatorcontrib><collection>CrossRef</collection><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>Materials Science & Engineering Collection</collection><collection>ProQuest Central</collection><collection>Advanced Technologies & Aerospace Database (1962 - current)</collection><collection>ProQuest Central Essentials</collection><collection>ProQuest Central</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Central</collection><collection>ProQuest Central Student</collection><collection>SciTech Premium Collection</collection><collection>ProQuest Computer Science Collection</collection><collection>Computer science database</collection><collection>ProQuest Engineering Collection</collection><collection>Engineering Database</collection><collection>ProQuest advanced technologies & aerospace journals</collection><collection>ProQuest Advanced Technologies & Aerospace Collection</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><collection>Engineering collection</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>Journal of computational electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Larcher, Luca</au><au>Padovani, Andrea</au><au>Vandelli, Luca</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A simulation framework for modeling charge transport and degradation in high-k stacks</atitle><jtitle>Journal of computational electronics</jtitle><stitle>J Comput Electron</stitle><date>2013-12-01</date><risdate>2013</risdate><volume>12</volume><issue>4</issue><spage>658</spage><epage>665</epage><pages>658-665</pages><issn>1569-8025</issn><eissn>1572-8137</eissn><abstract>In this paper we present a comprehensive physical model that describes charge transport and degradation phenomena in high-k stacks. The physical mechanisms are modeled using a novel material-related approach that includes in a self-consistent fashion the charge transport (dominated by defect-assisted contribution), power dissipation and temperature increase, defect generation, and ion and vacancy diffusion and recombination. The physical properties of defects, which play a crucial role in determining the electrical behavior of the high-k stacks, depend on their atomistic configurations, as calculated using ab-initio methods. This simulation framework represents a powerful tool to interpret electrical characterization measurements. In addition, it can be used to optimize logic and memory device stacks thanks to its predictive statistical capabilities that allow reproducing gate current, threshold voltage increase and time to breakdown (TDDB) statistics. Simulation results performed using this simulation package are shown to reproduce accurately leakage current, Stress-Induced Leakage Current (SILC), threshold voltage shift observed during Positive Bias Temperature Instability (PBTI) stress, TDDB in various dielectric stacks.</abstract><cop>Boston</cop><pub>Springer US</pub><doi>10.1007/s10825-013-0526-z</doi><tpages>8</tpages></addata></record> |
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subjects | Charge transport Defects Degradation Electrical Engineering Electrical properties Energy Energy dissipation Engineering Grain boundaries Heat Leakage current Mathematical and Computational Engineering Mathematical and Computational Physics Mechanical Engineering Memory devices Optical and Electronic Materials Physical properties Simulation Software packages Stacks Temperature Theoretical Threshold voltage Transport phenomena |
title | A simulation framework for modeling charge transport and degradation in high-k stacks |
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