Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture

In reconfigurable system, fast reconfiguration and small size of configuration contexts are strongly required to enhance the processing performance and reduce the implementation overhead. In this paper, a hierarchical representation of contexts for CGRA called HCC is proposed to satisfy the above re...

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Veröffentlicht in:Science China. Information sciences 2013-11, Vol.56 (11), p.275-294
Hauptverfasser: Wang, YanSheng, Liu, LeiBo, Yin, ShouYi, Zhu, Min, Cao, Peng, Yang, Jun, Wei, ShaoJun
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Sprache:eng
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