A multiobjective optimization tool for Very Large Scale Integrated nonslicing floorplanning

ABSTRACT Floorplanning is a vital phase in the design process of Very Large Scale Integrated (VLSI) circuit physical design process. The main objective of floorplanning is to minimize the area and wire length with the fixed‐outline constraints. Most of the tools developed so for are using weighted s...

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Veröffentlicht in:International journal of circuit theory and applications 2013-09, Vol.41 (9), p.904-923
Hauptverfasser: Anand, S., Saravanasankar, S., Subbaraj, P.
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Saravanasankar, S.
Subbaraj, P.
description ABSTRACT Floorplanning is a vital phase in the design process of Very Large Scale Integrated (VLSI) circuit physical design process. The main objective of floorplanning is to minimize the area and wire length with the fixed‐outline constraints. Most of the tools developed so for are using weighted some approach. Hence, these tools suffer from weights assignment and undesirable bias toward particular objective. A tailor‐made multiobjective optimization tool could overcome this issue. In this article, we propose a new multiobjective optimization technique named self adaptive B*tree coded Archived Multiobjective Simulated Annealing Algorithm (AMOSA) and implemented to solve the VLSI nonslicing floorplanning problem. The proposed model provides choices from among different trade‐off solutions. The self adaptive B*tree coded AMOSA combines the novel cooling schedule, B*tree encoding, improved neighborhood search procedure, self adaptive local search, and the AMOSA. In B*tree coded AMOSA, the solution is represented using a B*tree. This representation causes a reduction in time and space complexity of AMOSA. The B*tree coded AMOSA is further improved with a novel cooling schedule, a self adaptive local search mechanism, and an improved neighborhood search procedure, resulting in further reduction of computational time and improvement in exploration capability. The FastSA, B*tree coded AMOSA, and the self adaptive B*tree coded AMOSA are tested with Microelectronics Center of North Carolina (MCNC) benchmarks. The results are compared and validated. The proposed method shows 59.8% improvement in the computational time for ami49 without changing the system quality. Copyright © 2012 John Wiley & Sons, Ltd.
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fullrecord <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_1448725675</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>3070519451</sourcerecordid><originalsourceid>FETCH-LOGICAL-c3609-e817afdb1bc9c27abba784741ef9c6c8013ec475c878d796e45013d3a9445c493</originalsourceid><addsrcrecordid>eNp10EFLHDEUB_BQKnSrxa8Q6KEFGU0mmUlyXBZdpYsetCp4CJnsmyXb7GRNsq3rpzdlSg-Fnh7vz4_H44_QMSWnlJD6zGZzKmv1Dk0oUaIiRDy-RxNClKyUlO0H9DGlNSFE1kxN0NMUb3Y-u9CtwWb3E3DYZrdxr6ZkA84heNyHiO8h7vHCxBXgW2s84KshwyqaDEs8hCF5Z92wwr0PIW69GYayHaGD3vgEn_7MQ_T94vxudlktbuZXs-misqwlqgJJhemXHe2ssrUwXWeE5IJT6JVtrSSUgeWisVLIpVAt8KZES2YU543lih2ir-PdbQzPO0hZb1yy4MsbEHZJU86lqJtWNIV-_oeuwy4O5buiWE2EJIoV9WVUNoaUIvR6G93GxL2mRP8uWZeSdSm5yJNR_nIe9v9jenY3HXU1apcyvPzVJv7QrWCi0Q_Xc_3tsRa0Xcx1y94ACy-MYA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1432078093</pqid></control><display><type>article</type><title>A multiobjective optimization tool for Very Large Scale Integrated nonslicing floorplanning</title><source>Access via Wiley Online Library</source><creator>Anand, S. ; Saravanasankar, S. ; Subbaraj, P.</creator><creatorcontrib>Anand, S. ; Saravanasankar, S. ; Subbaraj, P.</creatorcontrib><description>ABSTRACT Floorplanning is a vital phase in the design process of Very Large Scale Integrated (VLSI) circuit physical design process. The main objective of floorplanning is to minimize the area and wire length with the fixed‐outline constraints. Most of the tools developed so for are using weighted some approach. Hence, these tools suffer from weights assignment and undesirable bias toward particular objective. A tailor‐made multiobjective optimization tool could overcome this issue. In this article, we propose a new multiobjective optimization technique named self adaptive B*tree coded Archived Multiobjective Simulated Annealing Algorithm (AMOSA) and implemented to solve the VLSI nonslicing floorplanning problem. The proposed model provides choices from among different trade‐off solutions. The self adaptive B*tree coded AMOSA combines the novel cooling schedule, B*tree encoding, improved neighborhood search procedure, self adaptive local search, and the AMOSA. In B*tree coded AMOSA, the solution is represented using a B*tree. This representation causes a reduction in time and space complexity of AMOSA. The B*tree coded AMOSA is further improved with a novel cooling schedule, a self adaptive local search mechanism, and an improved neighborhood search procedure, resulting in further reduction of computational time and improvement in exploration capability. The FastSA, B*tree coded AMOSA, and the self adaptive B*tree coded AMOSA are tested with Microelectronics Center of North Carolina (MCNC) benchmarks. The results are compared and validated. The proposed method shows 59.8% improvement in the computational time for ami49 without changing the system quality. Copyright © 2012 John Wiley &amp; Sons, Ltd.</description><identifier>ISSN: 0098-9886</identifier><identifier>EISSN: 1097-007X</identifier><identifier>DOI: 10.1002/cta.829</identifier><identifier>CODEN: ICTACV</identifier><language>eng</language><publisher>Bognor Regis: Blackwell Publishing Ltd</publisher><subject>AMOSA ; Cooling ; Floorplanning ; Multiobjective optimization ; Optimization ; Reduction ; Schedules ; Searching ; Simulated annealing algorithm ; Very large scale ; Very large scale integration ; VLSI layout CAD</subject><ispartof>International journal of circuit theory and applications, 2013-09, Vol.41 (9), p.904-923</ispartof><rights>Copyright © 2012 John Wiley &amp; Sons, Ltd.</rights><rights>Copyright © 2013 John Wiley &amp; Sons, Ltd.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c3609-e817afdb1bc9c27abba784741ef9c6c8013ec475c878d796e45013d3a9445c493</citedby><cites>FETCH-LOGICAL-c3609-e817afdb1bc9c27abba784741ef9c6c8013ec475c878d796e45013d3a9445c493</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1002%2Fcta.829$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1002%2Fcta.829$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,780,784,1417,27924,27925,45574,45575</link.rule.ids></links><search><creatorcontrib>Anand, S.</creatorcontrib><creatorcontrib>Saravanasankar, S.</creatorcontrib><creatorcontrib>Subbaraj, P.</creatorcontrib><title>A multiobjective optimization tool for Very Large Scale Integrated nonslicing floorplanning</title><title>International journal of circuit theory and applications</title><addtitle>Int. J. Circ. Theor. Appl</addtitle><description>ABSTRACT Floorplanning is a vital phase in the design process of Very Large Scale Integrated (VLSI) circuit physical design process. The main objective of floorplanning is to minimize the area and wire length with the fixed‐outline constraints. Most of the tools developed so for are using weighted some approach. Hence, these tools suffer from weights assignment and undesirable bias toward particular objective. A tailor‐made multiobjective optimization tool could overcome this issue. In this article, we propose a new multiobjective optimization technique named self adaptive B*tree coded Archived Multiobjective Simulated Annealing Algorithm (AMOSA) and implemented to solve the VLSI nonslicing floorplanning problem. The proposed model provides choices from among different trade‐off solutions. The self adaptive B*tree coded AMOSA combines the novel cooling schedule, B*tree encoding, improved neighborhood search procedure, self adaptive local search, and the AMOSA. In B*tree coded AMOSA, the solution is represented using a B*tree. This representation causes a reduction in time and space complexity of AMOSA. The B*tree coded AMOSA is further improved with a novel cooling schedule, a self adaptive local search mechanism, and an improved neighborhood search procedure, resulting in further reduction of computational time and improvement in exploration capability. The FastSA, B*tree coded AMOSA, and the self adaptive B*tree coded AMOSA are tested with Microelectronics Center of North Carolina (MCNC) benchmarks. The results are compared and validated. The proposed method shows 59.8% improvement in the computational time for ami49 without changing the system quality. Copyright © 2012 John Wiley &amp; Sons, Ltd.</description><subject>AMOSA</subject><subject>Cooling</subject><subject>Floorplanning</subject><subject>Multiobjective optimization</subject><subject>Optimization</subject><subject>Reduction</subject><subject>Schedules</subject><subject>Searching</subject><subject>Simulated annealing algorithm</subject><subject>Very large scale</subject><subject>Very large scale integration</subject><subject>VLSI layout CAD</subject><issn>0098-9886</issn><issn>1097-007X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><recordid>eNp10EFLHDEUB_BQKnSrxa8Q6KEFGU0mmUlyXBZdpYsetCp4CJnsmyXb7GRNsq3rpzdlSg-Fnh7vz4_H44_QMSWnlJD6zGZzKmv1Dk0oUaIiRDy-RxNClKyUlO0H9DGlNSFE1kxN0NMUb3Y-u9CtwWb3E3DYZrdxr6ZkA84heNyHiO8h7vHCxBXgW2s84KshwyqaDEs8hCF5Z92wwr0PIW69GYayHaGD3vgEn_7MQ_T94vxudlktbuZXs-misqwlqgJJhemXHe2ssrUwXWeE5IJT6JVtrSSUgeWisVLIpVAt8KZES2YU543lih2ir-PdbQzPO0hZb1yy4MsbEHZJU86lqJtWNIV-_oeuwy4O5buiWE2EJIoV9WVUNoaUIvR6G93GxL2mRP8uWZeSdSm5yJNR_nIe9v9jenY3HXU1apcyvPzVJv7QrWCi0Q_Xc_3tsRa0Xcx1y94ACy-MYA</recordid><startdate>201309</startdate><enddate>201309</enddate><creator>Anand, S.</creator><creator>Saravanasankar, S.</creator><creator>Subbaraj, P.</creator><general>Blackwell Publishing Ltd</general><general>Wiley Subscription Services, Inc</general><scope>BSCLL</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>201309</creationdate><title>A multiobjective optimization tool for Very Large Scale Integrated nonslicing floorplanning</title><author>Anand, S. ; Saravanasankar, S. ; Subbaraj, P.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c3609-e817afdb1bc9c27abba784741ef9c6c8013ec475c878d796e45013d3a9445c493</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>AMOSA</topic><topic>Cooling</topic><topic>Floorplanning</topic><topic>Multiobjective optimization</topic><topic>Optimization</topic><topic>Reduction</topic><topic>Schedules</topic><topic>Searching</topic><topic>Simulated annealing algorithm</topic><topic>Very large scale</topic><topic>Very large scale integration</topic><topic>VLSI layout CAD</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Anand, S.</creatorcontrib><creatorcontrib>Saravanasankar, S.</creatorcontrib><creatorcontrib>Subbaraj, P.</creatorcontrib><collection>Istex</collection><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>International journal of circuit theory and applications</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Anand, S.</au><au>Saravanasankar, S.</au><au>Subbaraj, P.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A multiobjective optimization tool for Very Large Scale Integrated nonslicing floorplanning</atitle><jtitle>International journal of circuit theory and applications</jtitle><addtitle>Int. J. Circ. Theor. Appl</addtitle><date>2013-09</date><risdate>2013</risdate><volume>41</volume><issue>9</issue><spage>904</spage><epage>923</epage><pages>904-923</pages><issn>0098-9886</issn><eissn>1097-007X</eissn><coden>ICTACV</coden><abstract>ABSTRACT Floorplanning is a vital phase in the design process of Very Large Scale Integrated (VLSI) circuit physical design process. The main objective of floorplanning is to minimize the area and wire length with the fixed‐outline constraints. Most of the tools developed so for are using weighted some approach. Hence, these tools suffer from weights assignment and undesirable bias toward particular objective. A tailor‐made multiobjective optimization tool could overcome this issue. In this article, we propose a new multiobjective optimization technique named self adaptive B*tree coded Archived Multiobjective Simulated Annealing Algorithm (AMOSA) and implemented to solve the VLSI nonslicing floorplanning problem. The proposed model provides choices from among different trade‐off solutions. The self adaptive B*tree coded AMOSA combines the novel cooling schedule, B*tree encoding, improved neighborhood search procedure, self adaptive local search, and the AMOSA. In B*tree coded AMOSA, the solution is represented using a B*tree. This representation causes a reduction in time and space complexity of AMOSA. The B*tree coded AMOSA is further improved with a novel cooling schedule, a self adaptive local search mechanism, and an improved neighborhood search procedure, resulting in further reduction of computational time and improvement in exploration capability. The FastSA, B*tree coded AMOSA, and the self adaptive B*tree coded AMOSA are tested with Microelectronics Center of North Carolina (MCNC) benchmarks. The results are compared and validated. The proposed method shows 59.8% improvement in the computational time for ami49 without changing the system quality. Copyright © 2012 John Wiley &amp; Sons, Ltd.</abstract><cop>Bognor Regis</cop><pub>Blackwell Publishing Ltd</pub><doi>10.1002/cta.829</doi><tpages>20</tpages></addata></record>
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subjects AMOSA
Cooling
Floorplanning
Multiobjective optimization
Optimization
Reduction
Schedules
Searching
Simulated annealing algorithm
Very large scale
Very large scale integration
VLSI layout CAD
title A multiobjective optimization tool for Very Large Scale Integrated nonslicing floorplanning
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T23%3A13%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20multiobjective%20optimization%20tool%20for%20Very%20Large%20Scale%20Integrated%20nonslicing%20floorplanning&rft.jtitle=International%20journal%20of%20circuit%20theory%20and%20applications&rft.au=Anand,%20S.&rft.date=2013-09&rft.volume=41&rft.issue=9&rft.spage=904&rft.epage=923&rft.pages=904-923&rft.issn=0098-9886&rft.eissn=1097-007X&rft.coden=ICTACV&rft_id=info:doi/10.1002/cta.829&rft_dat=%3Cproquest_cross%3E3070519451%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1432078093&rft_id=info:pmid/&rfr_iscdi=true