Bitline Techniques With Dual Dynamic Nodes for Low-Power Register Files

Wide fan-in dynamic multiplexers are one of the critical circuits of read-out paths in high-speed register files. However, these dynamic gates have poor noise immunity, which is aggravated by their wide fan-in structure, and their high switching activity consumes significant power. We present new fo...

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Veröffentlicht in:	IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2013-04, Vol.60 (4), p.965-974
Hauptverfasser:	Singh, R., Gi-Moon Hong, Suhwan Kim
Format:	Artikel
Sprache:	eng
Schlagworte:	Capacitance Circuits Clocks Comparative analysis Domino logic circuits dynamic gates Dynamics Electric potential high-speed integrated circuits Logic gates low-power design Multiplexers Multiplexing Noise noise immunity register files Registers Switches Switching switching activity Transistors Voltage
Online-Zugang:	Volltext
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