Low-temperature pseudo-metal-oxide-semiconductor field-effect transistor measurements on bare silicon-on-insulator wafers
We extend the pseudo-metal-oxide-semiconductor field-effect transistor ( psi -MOSFET) technique to the low-temperature range in order to investigate the transport properties of as-fabricated silicon-on-insulator (SOI) wafers. This paper shows experimental results on the temperature dependence of dra...
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| Veröffentlicht in: | Applied physics letters 2012-08, Vol.101 (9), p.92110 |
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| container_title | Applied physics letters |
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| creator | Diab, A. Pirro, L. Ionica, I. Mescot, X. Ghibaudo, G. Cristoloveanu, S. |
| description | We extend the pseudo-metal-oxide-semiconductor field-effect transistor ( psi -MOSFET) technique to the low-temperature range in order to investigate the transport properties of as-fabricated silicon-on-insulator (SOI) wafers. This paper shows experimental results on the temperature dependence of drain current and extracted parameters (hole and electron mobility, subthreshold slope, and threshold voltage). In ultrathin SOI films, the coupling between channel and free surface is strong, degrading the subthreshold swing and threshold voltage. The impact of interface trap density is significant at low temperature. The good correlation between experimental and theoretical curves proves the feasibility of psi -MOSFET measurements on bare silicon-on-insulator wafers at low-temperature. |
| doi_str_mv | 10.1063/1.4748984 |
| format | Article |
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This paper shows experimental results on the temperature dependence of drain current and extracted parameters (hole and electron mobility, subthreshold slope, and threshold voltage). In ultrathin SOI films, the coupling between channel and free surface is strong, degrading the subthreshold swing and threshold voltage. The impact of interface trap density is significant at low temperature. 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This paper shows experimental results on the temperature dependence of drain current and extracted parameters (hole and electron mobility, subthreshold slope, and threshold voltage). In ultrathin SOI films, the coupling between channel and free surface is strong, degrading the subthreshold swing and threshold voltage. The impact of interface trap density is significant at low temperature. The good correlation between experimental and theoretical curves proves the feasibility of psi -MOSFET measurements on bare silicon-on-insulator wafers at low-temperature.</description><subject>Channels</subject><subject>Density</subject><subject>Drains</subject><subject>Electron mobility</subject><subject>Semiconductor devices</subject><subject>Threshold voltage</subject><subject>Transistors</subject><subject>Wafers</subject><issn>0003-6951</issn><issn>1077-3118</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><recordid>eNotkFtLAzEQhYMoWKsP_oN91IfU3Pb2KMUbFHzR55AmE4jsbtZMltp_7y7tMDCc4cw3cAi552zDWSWf-EbVqmkbdUFWnNU1lZw3l2TFGJO0akt-TW4Qf2ZZCilX5LiLB5qhHyGZPCUoRoTJRdpDNh2Nf8EBReiDjYObbI6p8AE6R8F7sLnIyQwYcNn3YHAG9DBkLOJQ7M1Mw9Atp3TuMODUmcV5MB4S3pIrbzqEu_Nck-_Xl6_tO919vn1sn3fUikpk6krDhVUOGu9bzhrlajOXYKBa51jZtNaCkK1XnLk9VFCZWvhS8L0tnWpruSYPJ-6Y4u8EmHUf0ELXmQHihJpLIcX8qqpm6-PJalNETOD1mEJv0lFzppd4NdfneOU_EjFwfQ</recordid><startdate>20120827</startdate><enddate>20120827</enddate><creator>Diab, A.</creator><creator>Pirro, L.</creator><creator>Ionica, I.</creator><creator>Mescot, X.</creator><creator>Ghibaudo, G.</creator><creator>Cristoloveanu, S.</creator><scope>AAYXX</scope><scope>CITATION</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>20120827</creationdate><title>Low-temperature pseudo-metal-oxide-semiconductor field-effect transistor measurements on bare silicon-on-insulator wafers</title><author>Diab, A. ; Pirro, L. ; Ionica, I. ; Mescot, X. ; Ghibaudo, G. ; Cristoloveanu, S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c262t-d5a12c4de8ff91084d7aaaa20e49dd0589cce239f410dbe6e6a72f521bc5d4973</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Channels</topic><topic>Density</topic><topic>Drains</topic><topic>Electron mobility</topic><topic>Semiconductor devices</topic><topic>Threshold voltage</topic><topic>Transistors</topic><topic>Wafers</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Diab, A.</creatorcontrib><creatorcontrib>Pirro, L.</creatorcontrib><creatorcontrib>Ionica, I.</creatorcontrib><creatorcontrib>Mescot, X.</creatorcontrib><creatorcontrib>Ghibaudo, G.</creatorcontrib><creatorcontrib>Cristoloveanu, S.</creatorcontrib><collection>CrossRef</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Applied physics letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Diab, A.</au><au>Pirro, L.</au><au>Ionica, I.</au><au>Mescot, X.</au><au>Ghibaudo, G.</au><au>Cristoloveanu, S.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Low-temperature pseudo-metal-oxide-semiconductor field-effect transistor measurements on bare silicon-on-insulator wafers</atitle><jtitle>Applied physics letters</jtitle><date>2012-08-27</date><risdate>2012</risdate><volume>101</volume><issue>9</issue><spage>92110</spage><pages>92110-</pages><issn>0003-6951</issn><eissn>1077-3118</eissn><abstract>We extend the pseudo-metal-oxide-semiconductor field-effect transistor ( psi -MOSFET) technique to the low-temperature range in order to investigate the transport properties of as-fabricated silicon-on-insulator (SOI) wafers. This paper shows experimental results on the temperature dependence of drain current and extracted parameters (hole and electron mobility, subthreshold slope, and threshold voltage). In ultrathin SOI films, the coupling between channel and free surface is strong, degrading the subthreshold swing and threshold voltage. The impact of interface trap density is significant at low temperature. The good correlation between experimental and theoretical curves proves the feasibility of psi -MOSFET measurements on bare silicon-on-insulator wafers at low-temperature.</abstract><doi>10.1063/1.4748984</doi></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0003-6951 |
| ispartof | Applied physics letters, 2012-08, Vol.101 (9), p.92110 |
| issn | 0003-6951 1077-3118 |
| language | eng |
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| source | Scitation (American Institute of Physics); AIP Digital Archive; Alma/SFX Local Collection |
| subjects | Channels Density Drains Electron mobility Semiconductor devices Threshold voltage Transistors Wafers |
| title | Low-temperature pseudo-metal-oxide-semiconductor field-effect transistor measurements on bare silicon-on-insulator wafers |
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