A 7-Bit 18th Order 9.6 GS/s FIR Up-Sampling Filter for High Data Rate 60-GHz Wireless Transmitters
This paper presents the design and measurement of a 4 × oversampled 18th order digital low-pass FIR filter. It is a key building block in the proposed digitally enhanced transmitter architecture for 60 GHz wireless high-data rate links. Spectrum mask requirements are fully satisfied for OFDM modulat...
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Veröffentlicht in: | IEEE journal of solid-state circuits 2012-07, Vol.47 (7), p.1743-1756 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | This paper presents the design and measurement of a 4 × oversampled 18th order digital low-pass FIR filter. It is a key building block in the proposed digitally enhanced transmitter architecture for 60 GHz wireless high-data rate links. Spectrum mask requirements are fully satisfied for OFDM modulated signals without requiring additional analog filtering. Pipelined CPL adders and TSPC flip-flops are used to enable a very high operation frequency. The core area is 0.1 mm 2 in a standard GP 65 nm CMOS process. Measured power consumption is 400 mW at 9.6 GS/s with a 1.4 V power supply voltage. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.2012.2191677 |